English
Language : 

MAX1236_09 Datasheet, PDF (20/22 Pages) Maxim Integrated Products – 2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
SINAD(dB)
=
20
×
log
⎡
⎣⎢
SignalRMS
NoiseRMS + THDRMS
⎤
⎦⎥
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the
ADC’s full-scale range, calculate the ENOB as follows:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the input signal’s first five harmonics to the fun-
damental itself. This is expressed as:
THD
=
⎛
20
×
log
⎜
⎜
⎝
⎛
⎜
V22
+
⎝
V32 + V42 +
V1
V52
⎞
⎟
⎠
⎞
⎟
⎟
⎠
where V1 is the fundamental amplitude, and V2 through
V5 are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next largest distor-
tion component.
Typical Operating Circuit
0.1μF
3.3V or 5V
ANALOG
INPUTS
RC NETWORK*
2kΩ
CREF
0.1μF
VDD
AIN0
AIN1
MAX1236
MAX1237
MAX1238
MAX1239
AIN3**/REF GND
5V
*RS
SDA
SCL
*RS
5V
RP
RP
μC
SDA
SCL
*RC NETWORK IS OPTIONAL
**AIN11/REF (MAX1238/MAX1239)
TOP VIEW
Pin Configurations
AIN0 1
AIN1 2
AIN2 3
AIN3/REF 4
MAX1236
MAX1237
8 VDD
7 GND
6 SDA
5 SCL
μMAX
AIN0 1
AIN1 2
AIN2 3
AIN3 4
AIN4 5
AIN5 6
AIN6 7
AIN7 8
MAX1238
MAX1239
QSOP
16 AIN8
15 AIN9
14 AIN10
13 AIN11/REF
12 VDD
11 GND
10 SDA
9 SCL
20 ______________________________________________________________________________________