MAX5487PMB1 Datasheet, PDF (2/7 Pages) Maxim Integrated Products – MAX5487PMB1 Peripheral Module

MAX5487PMB1 Peripheral Module
Component List
DESIGNATION
C1
J1
J2
QTY
1
1
1
DESCRIPTION
0.1FF Q10%, 16V X7R ceramic
capacitor (0603)
Murata GRM188R71C104KA01D
6-pin right-angle male header
6-pin straight male header
DESIGNATION QTY
R1, R2, R3
3
U1
1
—
1
*EP = Exposed pad.
DESCRIPTION
150I Q5% resistors (0603)
Dual, nonvolatile, 10kI digital
potentiometer (16 TQFN-EP*)
Maxim MAX5487ETE+
PCB: EPCB5487PM1
Component Supplier
SUPPLIER
Murata Electronics North America, Inc.
PHONE
770-436-1300
WEBSITE
www.murata-northamerica.com
Note: Indicate that you are using the MAX5487PMB1 when contacting this component supplier.
Detailed Description
SPI Interface
The MAX5487PMB1 peripheral module can plug directly
into a Pmod-compatible port (configured for SPI) through
connector J1. For information on the SPI protocol, refer to
the MAX5487/MAX5488/MAX5489 IC data sheet.
J1 provides connection of the module to the Pmod
host. The pin functions and pin assignments adhere to
the Pmod standard recommended by Digilent Inc. See
Table 1.
Connector J2 provides connection to the potentiometers.
See Table 2.
Software and FPGA Code
Example software and drivers are available that execute
directly without modification on several FPGA devel-
opment boards that support an integrated or synthe-
sized microprocessor. These boards include the Digilent
Nexys 3, Avnet LX9, and Avnet ZEDBoard, although
other platforms can be added over time. Maxim provides
complete Xilinx ISE projects containing HDL, Platform
Studio, and SDK projects. In addition, a synthesized bit
stream, ready for FPGA download, is provided for the
demonstration application.
The software project (for the SDK) contains several
source files intended to accelerate customer evalu-
ation and design. These include a base application
(maximModules.c) that demonstrates module function-
ality and uses an API interface (maximDeviceSpecific
Utilities.c) to set and access Maxim device functions
within a specific module.
Table 1. Connector J1 (SPI Communication)
PIN SIGNAL
DESCRIPTION
1
SS
Chip enable. Must be asserted low to
enable the SPI interface.
2
MOSI MAX5487 serial-data input
3
N.C. Not connected
4
SCK MAX5487 serial-clock input
5
GND Ground
6
VCC Power supply
Table 2. Connector J2 (SPI Communication)
PIN SIGNAL
DESCRIPTION
1
HA High terminal of resistor A
2
WA Wiper terminal of resistor A
3
LA
Low terminal of resistor A
4
HB High terminal of resistor B
5
WB Wiper terminal of resistor B
6
LB
Low terminal of resistor B
The source code is written in standard ANSI C format, and
all API documentation including theory/operation, register
description, and function prototypes are documented in
the API interface file (maximDeviceSpecificUtilities.h & .c).
The complete software kit is available for download at
www.maxim-ic.com. Quick start instructions are also
available as a separate document.
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