MAX14525 Datasheet, PDF (2/7 Pages) Maxim Integrated Products – Battery Switch with Four Enable Inputs

Battery Switch with Four Enable Inputs
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
IN, BAT, JIG, S_EN, ON_K ................................... -0.3V to +6.0V
TA ...........................................................................-0.3V to +28V
Continuous Power Dissipation (T_A = +70°C)
8-Pin TDFN (derate 11.9 mW/°C above +70°C) .........954 mW
Junction-to-Case Thermal Resistance
(θ_JC) (Note 1) ...............................................................37°C/W
Junction-to-Ambient Thermal Resistance
(θ_JA) (Note 1) ...............................................................84°C/W
Operating Temperature Range .......................... -40°C to +85°C
Junction Temperature ..................................................... +150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V_BAT = +2.2V to +5.5V, T_A = -40°C to +85°C, unless otherwise noted. Typical values are at V_BAT = +3.6V and T_A = +25°C.)
(Note 2)
PARAMETER
DC CHARACTERISTICS
Input Voltage Range
On-Resistance
Disable Supply Current
V_BAT Supply Current
Increase in Supply Current with
V_JIG/V_{S_EN} Voltage
Increase in Supply Current with
V_{ON_K} Voltage
Peak Current
UVLO Undervoltage Lockout
LOGIC INPUT
TA Threshold Voltage
TA Threshold Hysteresis
TA Input Resistance
JIG, S_EN Input Logic-High
JIG, S_EN Input Logic-Low
JIG, S_EN Input Leakage Current
SYMBOL
CONDITIONS
V_BAT, V_IN
R_ON
I_{BAT_DIS}
I_BAT
I_LOAD = 100mA, V_BAT = +3.0V
V_BAT = +5.5V
(V_JIG = V_{S_EN} = V_{ON_K} = V_TA = V_IN = 0)
V_JIG = V_{S_EN} = V_BAT , V_{ON_K} = V_TA = 0
ΔI_BAT V_JIG = V_{S_EN} = V_IH or V_IL
ΔI_BAT
I_LIM
V_BAT = V_{ON_K} = +3.6V
V_BAT = +3.6V
Ramping V_BAT
V_{TA_TH}
V_TA = 1V
V_IH
V_IL
I_IN
V_BAT = +5.5V
IN AND Gate Threshold Voltage
V_{IN_TH}
ON_K Threshold Voltage
ON_K Threshold Hysteresis
V_{ON_K_TH}
Low-to-high transition
(Figure 1)
MIN TYP MAX UNITS
2.2
5.5
V
35
90
mΩ
1
µA
0.8
4.5
µA
2
µA
4.5
µA
5
A
1.9
V
1.15
1.7
2.5
V
1%
50
100
180
kΩ
1.4
V
0.4
V
-200
+200
nA
0.3 x
V_BAT
0.6 x
V_BAT
V
2.94
3.0
3.06
V
1%
2 _______________________________________________________________________________________