MAX16826 Datasheet, PDF (19/26 Pages) Maxim Integrated Products – Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection

Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
Accessing the MAX16826
The communication between the µC and the MAX16826
is based on the usage of a set of protocols defined on
top of the standard I²C protocol definition. They are
exclusively write byte(s) and read byte(s).
The write byte protocol is as follows:
Write Byte(s)
1) The master sends a START condition.
2) The master sends the 7-bit slave address followed
by a write bit (low).
3) The addressed slave asserts an ACK by pulling
SDA low.
4) The master sends an 8-bit command code.
5) The slave asserts an ACK by pulling SDA low.
6) The master sends an 8-bit data byte.
7) The slave acknowledges the data byte.
8) The master generates a STOP condition or repeats
6 and 7 to write next byte(s).
The command is interpreted as the destination address
(register file unit) and data is written in the addressed
location. The slave asserts a NACK at step 5 if the com-
mand is not valid. The master then interrupts the com-
munication by issuing a STOP condition. If the address
is correct, the data byte is written to the addressed reg-
ister. After the write, the internal address pointer is
increased by one. When the last location is reached, it
cycles to the first register.
The read sequence is:
Read Byte(s)
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a
write bit (low).
3) The addressed slave asserts an ACK on the data
line.
4) The master sends an 8-bit command byte.
5) The active slave asserts an ACK on the data line.
6) The master sends a repeated START condition.
7) The master sends the 7-bit slave address plus a
read bit (high).
8) The addressed slave asserts an ACK on the data
line.
9) The slave sends an 8-bit data byte.
10) The master asserts a NACK on the data line to
complete operations or asserts an ACK and
repeats 9 and 10.
11) The master generates a STOP condition.
The data byte read from the device is the content of the
addressed location(s). Once the read is done, the inter-
nal pointer is increased by one. When the last location is
reached, it cycles to the first one. If the device is busy or
the address is not correct (out of memory map), the
command code is not acknowledged and the internal
address pointer is not altered. The master then inter-
rupts the communication by issuing a STOP condition.
WRITE BYTE FORMAT
S
SLAVE ADDRESS
7 BITS
Figure 7. Write Byte Format
R/W ACK
COMMAND
ACK
DATA
ACK P
0
8 BITS
8 BITS
COMMAND BYTE: SELECT REGISTER TO WRITE
DATA BYTE DATA GOES INTO THE REGISTER
SET BY THE COMMAND BYTE
READ BYTE FORMAT
S
SLAVE ADDRESS
7 BITS
R/W ACK
COMMAND
ACK SR
0
8 BITS
COMMAND BYTE: PREPARE DEVICE FOR
FOLLOWING READ
Figure 8. Read Byte Format
SLAVE ADDRESS
7 BITS
R/W ACK
DATA
NACK P
1
8 BITS
DATA BYTE DATA COMES FROM THE
REGISTER SET BY THE COMMAND BYTE
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