MAX6850 Datasheet, PDF (18/34 Pages) Maxim Integrated Products – 4-Wire Interfaced, 7-, 14-, and 16-Segment Alphanumeric Vacuum-Fluorescent Display Controller

4-Wire Interfaced, 7-, 14-, and 16-Segment Alpha-
numeric Vacuum-Fluorescent Display Controller
Table 19. Blink Rate Selection (B Data Bit D2) Format
MODE
Slow blinking (cursor and annunciators blink on for 1s, off for 1s, for OSC = 4MHz)
Fast blinking (cursor and annunciators blink on for 0.5s, off for 0.5s, for OSC = 4MHz)
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
PMR T F 0 L S
PMR T F 1 L S
Configuration Lock (L Data Bit D1) Format
The configuration lock register is a safety feature to
reduce the risk of the VFD configuration settings being
inadvertently changed due to spurious writes if soft-
ware fails. When set, the shift-limit register (0x0E), grids
register (0x03), and output map data (0x06) can be
read but cannot be written. The output map data point-
er itself may be written in order to allow the output map
data to be read back (Table 18).
Blink Rate Selection (B Data Bit D2) Format
The B bit in the configuration register selects the blink
rate of the cursor and annunciator segments. This is the
speed that the segments blink on and off when blinking
is selected for these segments. The frequency of the
multiplex clock OSC and the setting of the B bit (Table
19) determine the blink rate.
Font Selection (F Data Bit D3) Format
The F bit (Table 20) selects the internal font map
between 14-segment and 16-segment displays. If a 7-
segment display is used, the F bit can be either set or
cleared.
Global Blink Timing Synchronization
(T Data Bit D4) Format
Setting the T bit in multiple MAX6850s at the same time
(or in quick succession) synchronizes the blink timing
across all the devices (Table 21). The display multiplex-
ing sequence is also reset, which can give rise to a
one-time display flicker when the register is written.
Global Clear Digit Data (R Data Bit D5) Format
When the R bit (Table 22) is set, the segment and
annunciator data are cleared.
Display Mode (M Data Bit D6) Format
The M bit (Table 23) selects the display modes (Table 1).
The display modes trade the maximum allowable
number of digits (mode 96/2) against the availability of
annunciator segments (mode 48/1).
Blink Phase Readback (P Data Bit D7) Format
When the configuration register is read, the P bit
reflects the blink phase at that time (Table 24).
Microcontroller 4-Wire Serial Interface
The MAX6850 communicates through an SPI-compati-
ble 4-wire serial interface (Figure 8). The interface has
three inputs, clock (SCLK), chip select (CS), data in
(DIN), and output data out (DOUT). CS must be low to
clock data into or out of the device, and DIN must be
stable when sampled on the rising edge of SCLK.
DOUT is not a specific pin, but instead, any of the
PUMP, PORT0, or PORT1 outputs can be configured to
be DOUT. DOUT is stable on the rising edge of SCLK.
While the SPI protocol expects DOUT to be high
impedance when the MAX6850 is not being accessed,
DOUT on the MAX6850 is never high impedance. SCLK
and DIN can be used to transmit data to other peripher-
als. The MAX6850 ignores all activity on SCLK and DIN
except when CS is low.
Control and Operation Using the 4-Wire
Interface
Controlling the MAX6850 requires sending a 16-bit
word. The first byte, D15 through D8, is the command
address, and the second byte, D7 through D0, is the
data to be written to the command address (Table 25).
Connecting Multiple MAX6850s to the
4-Wire Bus
Daisy-chain multiple MAX6850s by connecting the
DOUT of one device to the DIN of the next, and driving
SCLK and CS lines in parallel. Data at DIN propagates
through the internal shift registers and appears at
DOUT 15.5 clock cycles later, clocked out on the rising
edge of SCLK. When sending commands to daisy-
chained MAX6850s, all devices are accessed at the
same time. An access requires (16 x n) clock cycles,
where n is the number of MAX6850s connected togeth-
er. To update just one device in a daisy-chain, send the
no-op command (0x00) to the others. Care must be
taken on power-up when daisy-chaining the serial inter-
face in this manner. Configure each MAX6850’s PORT0
or PORT1 outputs, in turn, to act as DOUT before data
propagates through it. For this reason, PORT0 is the
preferred output to configure as DOUT because its out-
put on power-up is low. This means that a daisy-
chained DIN input taking data from an uninitialized
PORT0 output clocks in 16 logic zeros, which is the
safe no-op instruction.
18 ______________________________________________________________________________________