MAX15118 Datasheet, PDF(18/23 Page) Maxim Integrated Products – High-Efficiency, 18A, Current-Mode Synchronous Step-Down Regulator with Integrated Switches

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MAX15118

High-Efficiency, 18A, Current-Mode Synchronous

Step-Down Regulator with Integrated Switches

The peak current-mode controllerâs modulator gain is

attenuated by the equivalent divider ratio of the load

resistance and the current-loop gain. GMOD becomes:

GMOD

gMC

RLOAD

fSWx L

ï£®ï£°K S

(1-

0.5ï£¹ï£»

where RLOAD = VOUT/IOUT(MAX), fSW is the switching

frequency, L is the output inductance, D is the duty cycle

(VOUT/VIN), and KS is the slope compensation factor

calculated as:

VSLOPE Ã

VIN

fSW Ã L

- VOUT

gMC

where VSLOPE = 130mV and gMC = 150A/V.

The power modulatorâs dominant pole is a function of the

parallel effects of the load resistance and the current-

loop gainâs equivalent impedance. Assuming that ESR

of the output capacitor is much smaller than the parallel

combination of the load and the current loop, fPMOD can

be calculated as:

fPMOD

2Ï Ã COUT Ã RLOAD

[K S Ã (1- D) - 0.5]

2Ï Ã fSW Ã L Ã COUT

The power modulator zero is:

fZMOD

fZESR

2Ï

COUT

ESR

The total system transfer can be written as:

GAIN(s) = GFF(s) Ã GEA(s) Ã GMOD(DC)

Ã GFILTER(s) Ã GSAMPLING(s)

where:

GFF

(s)

R1+ R2

sCFFR1+ 1

sCFF (R1||R2) +

GEA

(s)

AVEA(dB)/20

sCCRC + 1

C ï£«ï£¬ï£¬ï£ 10

AVEA(dB)/20

ï£¶

ï£·ï£·ï£¸

GFILTER(s) = RLOAD

sC OUT

ï£«

ï£¬

ï£

2Ï

sCOUTESR + 1

+ K S Ã (1- D) -

RLOAD 2Ï Ã fSW Ã

0.5

ï£¶

ï£·

ï£¸

-1

GSAMPLING(s) =

(Ï Ã fSW )2

Ï Ã fSW

Ã QC

where QC

Ï Ã [K S Ã (1- D) - 0.5]

The dominant poles and zeros of the transfer loop gain

are:

fP1

2Ï

Ã10 AVEA(dB)/20

fP2

2Ï

OUT

ï£«

ï£¬

ï£

RLOAD

Ã (1- D) -

fSW Ã L

0.5ï£¶ -1

ï£·

ï£¸

fP3

fSW

fZ1

2Ï

C CR C

fZ2

2Ï

C OUTESR

The order of pole occurrence is:

fP1 < fP2 < fZ1 < fCO < fP3 < fZ2

▷