MAX15002_12 Datasheet, PDF (18/29 Pages) Maxim Integrated Products – Dual-Output Buck Controller with Tracking/Sequencing

MAX15002
Dual-Output Buck Controller with
Tracking/Sequencing
Setting the Current Limit
Connect a 25kΩ to 150kΩ resistor, R_{ILIM_}, from ILIM_ to
SGND to program the valley current-limit threshold
(V_CL) from 50mV to 300mV. ILIM_ sources 20µA out to
R_{ILIM_}. The resulting voltage divided by 10 is the valley
current-limit threshold.
The MAX15002 uses a valley current-sense method for
current limiting. The voltage drop across the low-side
MOSFET due to its on-resistance is used to sense the
inductor current. The voltage drop (V_VALLEY) across the
low-side MOSFET at the valley point and at I_LOAD is:
V_VALLEY
=
RDS(ON)
×
⎛⎝⎜_ILOAD
−
∆I_P−P
2
⎞
⎠⎟
R_DS(ON) is the on-resistance of the low-side MOSFET,
I_LOAD is the rated load current, and ∆I_P-P is the peak-
to-peak inductor current.
The R_DS(ON) of the MOSFET varies with temperature.
Calculate the R_DS(ON) of the MOSFET at its operating
junction temperature at full load using the MOSFET
datasheet. To compensate for this temperature varia-
tion, the 20µA ILIM reference current has a temperature
coefficient of 3333ppm/°C. This allows the valley cur-
rent-limit threshold (V_CL) to track and partially compen-
sate for the increase in the synchronous MOSFET’s
R_DS(ON) with increasing temperature. Use the following
equation to calculate R_ILIM:
R_{ILIM _}
=
R_DS(ON)
× ^{⎛⎝⎜} I_CL(MAX)
−
∆I_{P −P}
2
⎞
⎠⎟
×10
20×10^{−6 ⎡⎣}1+3.333×10^−3 (T −25°C)^⎤⎦
where I_CL(MAX) is the maximum current limit.
Figure 4 illustrates the effect of the MAX15002 ILIM ref-
erence current temperature coefficient to compensate
for the variation of the MOSFET R_DS(ON) over the oper-
ating junction temperature range.
Power MOSFET Selection
When choosing the MOSFETs, consider the total gate
charge, R_DS(ON), power dissipation, the maximum drain-
to-source voltage and package thermal impedance. The
product of the MOSFET gate charge and on-resistance is
a figure of merit, with a lower number signifying better
performance. Choose MOSFETs that are optimized for
high-frequency switching applications. The average gate-
drive current from the MAX15002’s output is proportional
to the frequency and gate charge required to drive the
MOSFET. The power dissipated in the MAX15002 is pro-
portional to the input voltage and the average drive cur-
rent (see the Power Dissipation section).
18
VALLEY CURRENT-LIMIT THRESHOLD
AND RDS(ON) vs. TEMPERATURE
1.5
1.4
RDS(ON)
1.3
1.2
1.1
VILIM_
1.0
0.9
0.8
0.7
0.6
RILIM_ = 25.5kΩ
0.5
-50 -30 -10 10 30 50 70 90 110 130 150
TEMPERATURE (°C)
Figure 4. Current-Limit Trip Point and V_RDS(ON) vs. Temperature
Compensation Design Guidelines
The MAX15002 uses a fixed-frequency, voltage-mode
control scheme that regulates the output voltage by dif-
ferentially comparing the output voltage against a fixed
reference. The subsequent error voltage that appears at
the error amplifier output (COMP) is compared against
an internal ramp voltage to generate the required duty
cycle of the pulse-width modulator. A second order low-
pass LC filter removes the switching harmonics and
passes the DC component of the pulse-width-modulat-
ed signal to the output. The LC filter, which has an atten-
uation slope of -40dB/dec, introduces 180° of phase
shift at frequencies above the LC resonant frequency.
This phase shift, in addition to the inherent 180° of
phase shift of the regulator’s self-governing (negative)
feedback system, poses the potential for positive feed-
back. The error amplifier and its associated circuitry are
designed to compensate for this instability to achieve a
stable closed-loop system.
The basic regulator loop consists of a power modulator
(comprised of the regulator’s pulse-width modulator,
associated circuitry, and LC filter), an output feedback
divider, and an error amplifier. The power modulator
has a DC gain set by V_IN/V_RAMP, where V_RAMP’s ampli-
tude is typically 2V_P-P. The output filter is effectively
modeled as a double pole and a single zero set by the
output inductance (L), the output capacitance (C_OUT),
the DC resistance of the inductor (DCR), and its equiv-
alent series resistance (ESR).
Maxim Integrated