MAX19507 Datasheet, PDF (16/34 Pages) Maxim Integrated Products – Dual-Channel, 8-Bit, 130Msps ADC

Dual-Channel, 8-Bit, 130Msps ADC
CS
SCLK
SDIN
R/W A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
R/W
0 = WRITE
1 = READ
ADDRESS
DATA
WRITE OR READ
Figure 6. Serial-Interface Communication Cycle
t_CSS
t_CSH
CS
t_SCLK
SCLK
SDIN
t_SDS
t_SDH
WRITE
t_SDD
READ
Figure 7. Serial-Interface Timing Diagram
Serial Programming Interface
A serial interface programs the MAX19507 control reg-
isters through the CS, SDIN, and SCLK inputs. Serial
data is shifted into SDIN on the rising edge of SCLK
when CS is low. The MAX19507 ignores the data pre-
sented at SDIN and SCLK when CS is high. CS must
transition high after each read/write operation. SDIN
also serves as the serial-data output for reading control
registers. The serial interface supports two-byte transfer
in a communication cycle. The first byte is a control
byte, containing the address and read/write instruction,
written to the MAX19507. The second byte is a data
byte and can be written to or read from the MAX19507.
Figure 6 shows a serial-interface communication cycle.
The first SDIN bit clocked in establishes the communi-
cation cycle as either a write or read transaction (0 for
write operation and 1 for read operation). The following
7 bits specify the address of the register to be written or
read. The final 8 SDIN bits are the register data. All
address and data bits are clocked in or out MSB first.
During a read operation, the MAX19507 serial port dri-
ves read data (D7) into SDIN after the falling edge of
SCLK following the 8th rising edge of SCLK. Since the
minimum hold time on SDIN input is zero, the master
can stop driving SDIN any time after the 8th rising edge
of SCLK. Subsequent data bits are driven into SDIN on
the falling edge of SCLK. Output data in a read opera-
tion is latched on the rising edge of SCLK. Figure 7
shows the detailed serial-interface timing diagram.
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