DS3234 Datasheet, PDF (16/20 Pages) Maxim Integrated Products – Extremely Accurate SPI Bus RTC with Integrated Crystal and SRAM

Extremely Accurate SPI Bus RTC with
Integrated Crystal and SRAM
NAME:
POR*:
BIT 7
SIGN
0
BIT 6
DATA
0
BIT 5
DATA
0
BIT 4
DATA
0
BIT 3
DATA
0
Aging Offset (10h/90h)
BIT 2
DATA
0
BIT 1
DATA
0
BIT 0
DATA
0
NAME:
POR*:
BIT 7
SIGN
0
BIT 6
DATA
0
BIT 5
DATA
0
Temperature Register (MSB) (11h)
BIT 4
DATA
0
BIT 3
DATA
0
BIT 2
DATA
0
BIT 1
DATA
0
BIT 0
DATA
0
Temperature Register (LSB) (12h)
NAME:
POR*:
BIT 7
DATA
0
BIT 6
DATA
0
BIT 5
0
0
BIT 4
0
0
BIT 3
0
0
BIT 2
0
0
BIT 1
0
0
BIT 0
0
0
*POR is defined as the first application of power to the device, either V_BAT or V_CC.
Aging Offset Register (10h/90h)
The aging offset register provides an 8-bit code to add
to or subtract from the oscillator capacitor array. The
data is encoded in two’s complement, with bit 7 repre-
senting the SIGN bit. One LSB represents the smallest
capacitor to be switched in or out of the capacitance
array at the crystal pins. The offset register is added to
the capacitance array during a normal temperature
conversion, if the temperature changes from the previ-
ous conversion, or during a manual user conversion
(setting the CONV bit). To see the effects of the aging
register on the 32kHz output frequency immediately, a
manual conversion should be performed after each
aging offset register change.
Positive aging values add capacitance to the array,
slowing the oscillator frequency. Negative values
remove capacitance from the array, increasing the
oscillator frequency.
The change in ppm per LSB is different at different tem-
peratures. The frequency vs. temperature curve is shift-
ed by the values used in this register. At +25°C, one
LSB typically provides about 0.1ppm change in fre-
quency. These bits are all set to logic 0 when power is
first applied.
Temperature Registers (11h–12h)
Temperature is represented as a 10-bit code with a res-
olution of 0.25°C and is accessible at location 11h and
12h. The temperature is encoded in two’s complement
format, with bit 7 in the MSB representing the SIGN bit.
The upper 8 bits are at location 11h and the lower 2 bits
are in the upper nibble at location 12h. Upon power
reset, the registers are set to a default temperature of
0°C and the controller starts a temperature conversion.
New temperature readings are stored in this register.
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