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MAX1669 Datasheet, PDF (15/20 Pages) Maxim Integrated Products – Fan Controller and Remote Temperature Sensor with SMBus Serial Interface
Fan Controller and Remote Temperature Sensor
with SMBus Serial Interface
Table 9. Status Byte Bit Assignments
BIT
7
(MSB)
6
5
NAME
I/O1
I/O2
TRAN1*
FUNCTION
This bit indicates the current state of I/O1 (unlatched).
This bit indicates the current state of I/O2 (unlatched).
This bit is set if a low-to-high or high-to-low transition has occurred at I/O1 (regardless of the
state of the mask bits).
4
TRAN2*
This bit is set if a low-to-high or high-to-low transition has occurred at I/O2 (regardless of the
state of the mask bits).
3
RHIGH*
A high indicates that the high-temperature alarm has activated
2
RLOW*
A high indicates that the low-temperature alarm has activated.
1
DIODE
A high indicates a remote-diode fault (open-circuit, shorted diode, or DXP short to GND).
0 (LSB)
OVERT
When the TCRIT threshold is crossed, this bit goes high. The polarity of this bit does not depend
on the POL bit (bit 5 in configuration byte).
*TRAN1 and TRAN2 alarm flags stay high until cleared by POR or until the status byte register is read. RHIGH and RLOW alarm
flags stay high until cleared by POR or the temperature fault is removed and the status byte is read.
Table 10. Device ID Code
MAX1669 ID CODE
LS BYTE
LSBs MSBs
MS BYTE
LSBs MSBs
0000 0101
0000 0000
Table 11. Slave Address Decoding
(ADD_ Pins)
ADD0
ADD1
ADD2
ADDRESS
GND
GND
GND
0011 000b
GND
GND
GND
VCC
VCC
VCC
VCC
GND
VCC
VCC
GND
GND
VCC
VCC
VCC
GND
VCC
GND
VCC
GND
VCC
0011 001b
0011 010b
0101 001b
0101 010b
0101 011b
1001 100b
1001 101b
Slave Addresses
The MAX1669 appears to the SMBus as one device
having a common address for the temperature sensor
section, GPIO section, and fan-control section. The
device address can be set to one of eight different val-
ues by pin-strapping ADD_ pins so that more than one
MAX1669 can reside on the same bus without address
conflicts (Table 11).
The MAX1669 also responds to the SMBus Alert
Response slave address (see the Alert Response
Address section).
POR and UVLO
The MAX1669’s memory is volatile. To prevent ambigu-
ous power-supply conditions from corrupting the data
in memory and causing erratic behavior, a POR voltage
detector monitors VCC and clears the memory if VCC
falls below 1.85V (typical, see the Electrical Character-
istics table). When power is first applied and VCC rises
above 1.9V (typ), the logic blocks begin operating;
although reads and writes at VCC levels below 3V are
not recommended. A second VCC comparator, the
ADC UVLO comparator, prevents the ADC from con-
verting until there is sufficient headroom (VCC = 2.8V typ).
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