MAX1617_12 Datasheet, PDF (14/20 Pages) Maxim Integrated Products – Remote/Local Temperature Sensor with SMBus Serial Interface

MAX1617
Remote/Local Temperature Sensor
with SMBus Serial Interface
Table 8. RLTS and RRTE Temp Register Update Timing Chart
OPERATING MODE
CONVERSION INITIATED BY:
NEW CONVERSION RATE
(CHANGED VIA WRITE TO
WCRW)
TIME UNTIL RLTS AND RRTE
ARE UPDATED
Auto-Convert
Auto-Convert
Auto-Convert
Auto-Convert
Auto-Convert
Auto-Convert
Auto-Convert
Auto-Convert
Auto-Convert
Auto-Convert
Auto-Convert
Hardware Standby
Software Standby
Software Standby
Power-on reset
1-shot command, while idling
between automatic conversions
1-shot command that occurs
during a conversion
Rate timer
Rate timer
Rate timer
Rate timer
Rate timer
Rate timer
Rate timer
Rate timer
STBY pin
RUN/STOP bit
1-shot command
n/a (0.25Hz)
n/a
n/a
0.0625Hz
0.125Hz
0.25Hz
0.5Hz
1Hz
2Hz
4Hz
8Hz
n/a
n/a
n/a
156ms max
156ms max
When current conversion is
complete (1-shot is ignored)
20sec
10sec
5sec
2.5sec
1.25sec
625ms
312.5ms
237.5ms
156ms
156ms
156ms
Slave Addresses
The MAX1617 appears to the SMBus as one device
having a common address for both ADC channels. The
device address can be set to one of nine different val-
ues by pin-strapping ADD0 and ADD1 so that more
than one MAX1617 can reside on the same bus without
address conflicts (Table 9).
The address pin states are checked at POR only, and
the address data stays latched to reduce quiescent
supply current due to the bias current needed for high-Z
state detection.
The MAX1617 also responds to the SMBus Alert
Response slave address (see the Alert Response
Address section).
POR and UVLO
The MAX1617 has a volatile memory. To prevent ambigu-
ous power-supply conditions from corrupting the data in
memory and causing erratic behavior, a POR voltage
detector monitors V_CC and clears the memory if V_CC falls
below 1.7V (typical, see Electrical Characteristics table).
When power is first applied and V_CC rises above 1.75V
(typical), the logic blocks begin operating, although reads
and writes at V_CC levels below 3V are not recommended.
A second V_CC comparator, the ADC UVLO comparator,
prevents the ADC from converting until there is sufficient
headroom (V_CC = 2.8V typical).
Table 9. Slave Address Decoding (ADD0
and ADD1)
ADD0
GND
GND
GND
High-Z
High-Z
High-Z
V_CC
V_CC
V_CC
ADD1
GND
High-Z
V_CC
GND
High-Z
V_CC
GND
High-Z
V_CC
ADDRESS
0011 000
0011 001
0011 010
0101 001
0101 010
0101 011
1001 100
1001 101
1001 110
Note: High-Z means that the pin is left unconnected.
Power-Up Defaults:
• Interrupt latch is cleared.
• Address select pins are sampled.
• ADC begins auto-converting at a 0.25Hz rate.
• Command byte is set to 00h to facilitate quick
remote Receive Byte queries.
• T_HIGH and T_LOW registers are set to max and min
limits, respectively.
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Maxim Integrated