MAX14955 Datasheet, PDF (14/19 Pages) Maxim Integrated Products – Computer on Modules

MAX14955
Pin Configuration
Single-Lane PCIe Gen III Redriver
with Equalization and Extended
Temperature Operation
TOP VIEW
30 29 28 27 26 25 24 23 22 21
GND 31
20 I.C.
I.C. 32
19 I.C.
VCC 33
18 V_CC
I.C. 34
17 I.C.
OEQA0 35
OEQA1 36
MAX14955
16 INEQB0
15 INEQB1
OEQA2 37
14 OEQB0
INEQA0 38
INEQA1 39
+
EP*
13 OEQB1
12 OEQB2
VCC 40
11 VCC
1 2 3 4 5 6 7 8 9 10
TQFN
(5mm x 5mm)
*EXPOSED PAD. CONNECT TO GND.
Pin Description
PIN
1, 2, 5, 7, 10,
21, 24, 26,
29, 31
3
4
NAME
GND
INAP
INAM
6
EN
8
9
11, 18, 33,
40
12
13
OUTBP
OUTBM
V_CC
OEQB2
OEQB1
FUNCTION
Ground
Noninverting Input, Channel A
Inverting Input, Channel A
Enable Input. Drive EN low for standby mode. Drive EN high for normal mode. EN has a 375kI (typ)
internal pulldown resistor.
Noninverting Output, Channel B
Inverting Output, Channel B
Power-Supply Input. Bypass V_CC to GND with 0.1FF and 0.01FF capacitors in parallel as close as
possible to the device.
Output Deemphasis Control MSB, Channel B. OEQB2 has a 375kI (typ) internal pulldown resistor.
Output Deemphasis Bit 1, Channel B. OEQB1 has a 375kI (typ) internal pulldown resistor.
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