DS80C320-QCG Datasheet, PDF (13/38 Pages) Maxim Integrated Products – High-Speed/Low-Power Microcontrollers

DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
DUAL DATA POINTER
Data memory block moves can be accelerated using the Dual Data Pointer (DPTR). The standard 8032
DPTR is a 16-bit value that is used to address off-chip data RAM or peripherals. In the
DS80C320/DS80C323, the standard 16-bit data pointer is called DPTR0 and is located at SFR addresses
82h and 83h. These are the standard locations. The new DPTR is located at SFR 84h and 85h and is
called DPTR1. The DPTR Select bit (DPS) chooses the active pointer and is located at the LSB of the
SFR location 86h. No other bits in register 86h have any effect and are set to 0. The user switches
between data pointers by toggling the LSB of register 86h. The increment (INC) instruction is the fastest
way to accomplish this. All DPTR-related instructions use the currently selected DPTR for any activity.
Therefore only one instruction is required to switch from a source to a destination address. Using the
Dual-Data Pointer saves code from needing to save source and destination addresses when doing a block
move. Once loaded, the software simply switches between DPTR and 1. The relevant register locations
are as follows.
DPL 82h
DPH 83h
DPL1 84h
DPH1 85h
DPS 86h
Low byte original DPTR
High byte original DPTR
Low byte new DPTR
High byte new DPTR
DPTR Select (LSB)
Sample code listed below illustrates the saving from using the dual DPTR. The example program was
original code written for an 8051 and requires a total of 1869 DS80C320/DS80C323 machine cycles. This
takes 299s to execute at 25MHz. The new code using the Dual DPTR requires only 1097 machine
cycles taking 175.5s. The Dual DPTR saves 772 machine cycles or 123.5s for a 64-byte block move.
Since each pass through the loop saves 12 machine cycles when compared to the single DPTR approach,
larger blocks gain more efficiency using this feature.
64-Byte Block Move without Dual Data Pointer
; SH and SL are high and low byte source address.
; DH and DL are high and low byte of destination address.
MOV
R5, #64d
MOV
DPTR, #SHSL
MOV
R1, #SL
MOV
R2, #SH
MOV
R3, #DL
MOV
R4, #DH
; NUMBER OF BYTES TO MOVE
; LOAD SOURCE ADDRESS
; SAVE LOW BYTE OF SOURCE
; SAVE HIGH BYTE OF SOURCE
; SAVE LOW BYTE OF DESTINATION
; SAVE HIGH BYTE OF DESTINATION
# CYCLES
2
3
2
2
2
2
MOVE:
; THIS LOOP IS PERFORMED THE NUMBER OF TIMES LOADED INTO R5, IN THIS EXAMPLE 64
MOVX
A, @DPTR
; READ SOURCE DATA BYTE
2
MOV
R1, DPL
; SAVE NEW SOURCE POINTER
2
MOV
R2, DPH
;
2
MOV
DPL, R3
; LOAD NEW DESTINATION
2
MOV
DPH, R4
;
2
MOVX
@DPTR, A
; WRITE DATA TO DESTINATION
2
INC
DPTR
; NEXT DESTINATION ADDRESS
3
MOV
R3, DPL
; SAVE NEW DESTINATION POINTER
2
MOV
R4, DPH
;
2
MOV
DPL, R1
; GET NEW SOURCE POINTER
2
MOV
DPH, R2
;
2
INC
DPTR
; NEXT SOURCE ADDRESS
3
DJNZ
R5, MOVE
; FINISHED WITH TABLE?
3
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