DS3100DK Datasheet, PDF (13/32 Pages) Maxim Integrated Products – Stratum 3/E3 Timing Card IC Demo Kit

DS3100DK
4.9 BITS Receivers and BITS Transmitters
The Mode fields in these boxes set the basic line mode for each port (DS1 ESF or SF, E1, 2048kHz, and—for
receivers only—6312kHz). The termination fields specify the line termination for the receiver or transmitter port.
The DS3100 supports either internal termination (inside the device) or external termination (resistors on the board).
As shipped from the factory the demo kit hardware does not have external termination resistors populated, and
therefore only the internal termination options should be selected in the software. The input clock (IC1–IC14) to
which each BITS receiver should be connected is specified in the CLOCK DEST fields. The output clock to which
each BITS transmitter should be connected is specified in the CLOCK SOURCE fields.
In the BITS Transmitters box, when a transmitter is in DS1 ESF or E1 mode, the SSM value to be transmitted can
be specified in the SSM fields below the TX1 and TX2 headings. In E1 mode, the Sa bit channel in which to
transmit SSMs can be specified (for both transmitters) in the small combo box next to the SSM label.
In the BITS Receivers box, when a receiver is in DS1 ESF or E1 mode, the received SSM values are displayed in
the SSM fields below the RX1 and RX2 headings. In E1 mode, the Sa channel in which to look for incoming SSMs
can be specified (for both receivers) in the small combo box next to the SSM label.
In future releases of the DS3100DK software, the headings RX1, RX2, TX1, and TX2 will also be buttons that open
secondary windows with additional configuration and status fields.
4.9.1 Note About Working with the BITS Receivers and Transmitters
1) When switching BITS transmitter or receiver modes, the termination must be changed to match: internal
100Ω for DS1, internal 75Ω or 120Ω for E1 and 2048kHz, internal 75Ω for 6312kHz.
2) When switching BITS transmitter modes between DS1 and E1/2048kHz modes, the rate of the transmit
clock source (typically OC9) must be changed to match: 1.544MHz for DS1 and 2.048MHz for
E1/2048kHz.
3) Enabling analog loopback between BITS transmitter 1 and BITS receiver 1 and between BITS transmitter 2
and BITS receiver 2 can be useful in evaluating the DS3100. During device initialization the DS3100DK
software enables analog loopback for both BITS transmitter/receiver pairs by setting ALB = 1 in registers
B1BLCR4 (address 93h) and B2BLCR4 (address 113h).
Table 4-8. Mapping Between BITS Software Fields and DS3100 Register Fields
SOFTWARE FIELD
BITS RECEIVERS
Mode
Termination
Clock Dest
Left-Hand SSM Combo (E1 Only)
SSM Textboxes
BITS TRANSMITTERS
Mode
Termination
Clock Source
Left-and SSM Combo (E1 Only)
Main SSM Combos
DS3100 REGISTER FIELDS
BMCR:RMODE, BCCR3:MCLKFC, BRMMR, BRCR1:RB8ZS,
BRCR1:RFM, BRCR3:RHDB3, BRCR3:RCRC4
See APPENDIX 2: BITS MODE WRITE SEQUENCES for
exact write sequences for each mode
BLCR3:RION, BLCR3:RIMP
BCCR2:RCLKD
BRMCR:SSMCH
DS1 ESF: BTBOC:TBOC
E1: BRMSR, BRSSM:SSM
BMCR:TMODE, BTMMR, BTCR1:TB8ZS, BTCR3:TFM,
BTCR4:THDB3, BTCR4:TCRC4, 60, 61
See APPENDIX 2: BITS MODE WRITE SEQUENCES for
exact write sequences.
BLCR2:TION, BLCR2:TIMP
BCCR1:TCLKS
Indicates which of BTSa4–BTSa8 to use
DS1 ESF: BRBOC:RBOC
E1: BTSa4–BTSa8
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