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DS1501_09 Datasheet, PDF (13/22 Pages) Maxim Integrated Products – Y2K-Compliant Watchdog Real-Time Clocks
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks
The third method of reading the time and date uses the alarm function. The alarm can be configured to activate
once per second, and the time-of-day alarm-interrupt enable bit (TIE) is enabled. The TE bit should always be
enabled. When the IRQ pin goes active, the time and date information does not change until the next update.
SETTING THE CLOCK
It is recommended to halt updates to the external set of double-buffered RTC registers when writing to the clock.
The (TE) bit should be used as described above before loading the RTC registers with the desired RTC count (day,
date, and time) in 24-hour BCD format. Setting the TE bit to 1 transfers the new values written to the internal RTC
registers and allows normal operation to resume.
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match between
the capacitive load of the oscillator circuit and the capacitive load for which the crystal was trimmed. Additional
error is added by crystal frequency drift caused by temperature shifts. External circuit noise coupled into the
oscillator circuit can result in the clock running fast.
A standard 32.768kHz quartz crystal should be directly connected to the DS1501 X1 and X2 oscillator pins. The
crystal selected for use should have a specified load capacitance (CL) of either 6pF or 12.5pF, and the CS bit set
accordingly. An external 32.768kHz oscillator can also drive the DS1501. When using an external oscillator the X2
pin must be left open. The DS1511 contains an embedded crystal and is factory trimmed to be better than ±1
min/month at +25°C.
Refer to Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for detailed information.
Table 2. Register Map
ADDRESS
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
13H
14H-1FH
B7
0
0
0
0
0
EOSC
AM1
AM2
AM3
AM4
BLF1
TE
DATA
B6
B5
B4
B3
10 Seconds
10 Minutes
0
10 Hours
0
0
0
0
0
10 Date
E32K BB32 10 Month
10 Year
10 Century
10 Seconds
10 Minutes
0
10 Hours
Dy/Dt
10 Date
0.1 Second
10 Second
BLF2 PRS
PAB
TDF
CS
BME
TPE
TIE
Extended RAM Address
Reserved
Reserved
Extended RAM Data
Reserved
B2
B1
Seconds
Minutes
Hour
Day
Date
Month
Year
Century
Seconds
Minutes
Hour
Day/Date
0.01 Second
Second
KSF WDF
KIE WDE
Note: 0 = 0 and are read only.
B0
IRQF
WDS
FUNCTION
Seconds
Minutes
Hours
Day
Date
Month
Year
Century
Alarm Seconds
Alarm Minutes
Alarm Hours
Alarm Day/Date
Watchdog
Watchdog
Control A
Control B
RAM Address
RAM Data
BCD
RANGE
00–59
00–59
00–23
1–7
01–31
01–12
00–99
00–39
00–59
00–59
00–23
1–7/1–31
00–99
00–99
00–FF
00–FF
POWER-UP DEFAULT STATES
These bits are set upon power-up: EOSC = 0, E32K = 0, TIE = 0, KIE = 0, WDE = 0, and WDS = 0. Unless
otherwise specified, the state of the control/RTC/SRAM bits in the DS1501/DS1511 is not defined upon initial
power application; the DS1501/DS1511 should be properly configured/defined during initial configuration.
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