MAX8563 Datasheet, PDF (12/15 Pages) Maxim Integrated Products – 1%, Ultra-Low Output Voltage, Dual and Triple Linear n-FET Controllers

±1%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllers
For the best transient response in applications with
large step loads (see the Input and Output Capacitor
Selection section for output capacitance requirements),
use the following equations to select the compensation
components:
C_C
=
⎡0.16 × V_OUT × C_OUT ×
⎤
⎢
⎥
( ) _⎣⎢^gC(MAX) ^×
g_C(MAX) × R_ESR + 1 _⎦⎥
2
−
C_ISS
( ) ^gC(MAX) ^{× V}OUT ^{+ I}OUT _MAX
( ^{( )} ) ^RC
=
59 ×
V_OUT x C_OUT g_C(MAX) x R_ESR + 1
C_C x g_C(MAX) × V_OUT + I_{OUT _ MAX}
where C_OUT is the output capacitance and R_ESR is the
ESR of C_OUT.
To use a low-cost ceramic capacitor (see the Input and
Output Capacitor Selection section for load-transient
response characteristics), use the following equations
to select the compensation components:
( ) ^{CC =}
C_OUT x g_C(MAX)
g_C(MAX) x V_OUT + I_{OUT _ MAX}
− C_ISS
R_C
=
15
x
C_OUT
C_C x g_C(MAX)
Example
OUTPUT 1 of Figure 1 is used in this example. Table 1
shows the values required to calculate the compensa-
tion. The values were taken from the appropriate data
sheets and Figure 1.
Table 1. Parameters Required to
Calculate Compensation
PARAMETER CONDITIONS
MOSFET C_ISS V_DS = 1V
MOSFET GFS IDFS = 8.8A
V_OUT1
Figure 1
I_{OUT_MAX}
C_OUT1
Figure 1
Figure 1
R_ESR
Figure 1
VALUE
2500
30
1.5
1.5
100
18
UNITS
pF
S
V
A
µF
mΩ
g_C(MAX) = 30S x
1.5A _{= 12.4S}
8.8A
⎛12.4S x ⎞
C_C
=
0.16
1.5V
x
x 100μF x 12.4S x _{⎝⎜18mΩ +1⎠⎟}
(12.4S x 1.5V + 1.5A)²
−
2500pF = 0.90μF, use 1μF.
R_C
=
59
1.5V
x
x 100μF
x (12.4S
x 18mΩ +1)
1μF(12.4S x 1.5V + 1.5A)
= 599.4Ω, use 620Ω.
PC Board Layout Guidelines
Due to the high-current paths and tight output accuracy
required by most applications, careful PC board layout is
required. An evaluation kit (MAX8563EVKIT) is available
to speed design.
It is important to keep all traces as short as possible to
maximize the high-current trace dimensions to reduce the
effect of undesirable parasitic inductance. The MOSFET
dissipates a fair amount of heat due to the high currents
involved, especially during large input-to-output voltage
differences. To dissipate the heat generated by the
MOSFET, make power traces very wide with a large
amount of copper area. An efficient way to achieve good
power dissipation on a surface-mount package is to lay
out copper areas directly under the MOSFET package on
multiple layers and connect the areas through vias. Use a
ground plane to minimize impedance and inductance. In
addition to the usual high-power considerations, here are
four tips to ensure high output accuracy:
• Ensure that the feedback connection to C_{OUT_} is
short and direct.
• Place the feedback resistors next to the FB pin.
• Place R_C and C_C next to the DRV_ pin.
• Ensure FB_ and DRV_ traces are away from noisy
sources to ensure tight accuracy.
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