MAX16831_09 Datasheet, PDF (12/19 Pages) Maxim Integrated Products – High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control

High-Voltage, High-Power LED Driver with
Analog and PWM Dimming Control
Connect the clock signal to the RTSYNC input. The
MAX16831 synchronizes to the external clock signal
after the detection of five successive clock edges at
RTSYNC.
A buffered clock output, CLKOUT, is capable of driving
the RTSYNC input of an external PWM controller for
multichannel applications. CLKOUT is capable of dri-
ving capacitive loads up to 500pF.
Multichannel Configuration
The MAX16831 is capable of multichannel operation.
Connect CLKOUT to the SYNC input of an external
device to use the MAX16831 as a master clock signal.
Connect an external clock signal to RTSYNC to config-
ure the MAX16831 as a slave. To setup two or more
MAX16831 devices in a daisy-chain/peer-to-peer con-
figuration, drive the RTSYNC input of one MAX16831
with the CLKOUT buffer of another (Figure 3).
ILIM and HICCUP Comparator
R_SENSE sets the peak current through the inductor for
switching. The differential voltage across R_SENSE is
compared to the 200mV voltage trip limit of the current-
limit comparator, ILIM. Set the current limit 20% higher
than the peak switch current at the rated output power
and minimum voltage. Use the following equation to
calculate R_SENSE:
R_SENSE = V_SENSE / (1.2 x I_PEAK)
where V_SENSE is the 200mV differential voltage
between SNS+ and SNS- and I_PEAK is the peak induc-
tor current at full load and minimum input voltage.
When the voltage drop across R_SENSE exceeds the
ILIM threshold, the MOSFET driver (DRV) terminates
the on-cycle and turns the switch off, reducing the cur-
rent through the inductor. The FET is turned back on at
the beginning of the next switching cycle.
When the voltage across R_SENSE exceeds the 300mV
(typ) HICCUP threshold, the HIC comparator terminates
the on-cycle of the device, turning the switching
MOSFET off. Following a startup delay of 4ms (typ), the
MAX16831 re-initiates soft-start. The device will contin-
ue to operate in HICCUP mode until the overcurrent
condition is removed.
A built-in 40ns leading-edge blanking circuit of the cur-
rent-sense signal prevents these comparators from pre-
maturely terminating the on-cycle of the external
switching MOSFET (Q_S). In some cases, this blanking
time may not be adequate and an additional RC filter
may be required to prevent spurious turn-off.
MASTER/PEER
SLAVE/PEER
MAX16831
MAX16831
RTSYNC
R_T
CLKOUT
RTSYNC
CLKOUT
Figure 3. Master-Slave/Peer-Peer Clock Configuration
Load Current Sense
The load-sense resistor, R_CS, monitors the current
through the LEDs. The internal floating current-sense
amplifier, CSA, measures the differential voltage across
R_CS, and generates a voltage proportional to the LED
current through R_CS at CS. This voltage on CS is
referred to AGND. The closed loop regulates the LED
current to a value, I_LED, given by the following equation:
I_LED = 0.107V / R_CS
Slope Compensation
The MAX16831 uses an internal ramp generator for
slope compensation. The internal ramp signal is reset
to zero at the beginning of each cycle and has a peak-
to-peak voltage of 120mV per switching cycle. Use an
external resistor, R_T, to set the switching frequency,
f_SW, and calculate the slope of the compensating ramp,
m_SLOPE, using the following equation:
m_SLOPE = 120 x f_SW [mV/s]
where f_SW is the switching frequency in Hz. When the
MAX16831 is synchronized to an external clock, the
slope compensation ramp has a slope of 15mV/µs.
Internal Voltage-Error Amplifier (EAMP)
The MAX16831 includes a built-in voltage amplifier,
with tri-state output, which can be used to close the
feedback loop. The buffered output current-sense sig-
nal appears at CS, which is connected to the inverting
input, FB, of the error amplifier through resistor R₁. The
noninverting input is connected to an internally trimmed
current reference.
The output of the error amplifier is controlled by the sig-
nal applied to DIM. When DIM is high, the output of the
amplifier is connected to COMP. The amplifier output is
open when DIM is low. This enables the integrating
12 ______________________________________________________________________________________