MAX14840E Datasheet, PDF (12/15 Pages) Maxim Integrated Products – 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers

40Mbps, +3.3V, RS-485 Half-Duplex
Transceivers
Detailed Description
The MAX14840E/MAX14841E are +3.3V ESD-protected
RS-485 transceivers intended for high-speed, half-duplex
communications. A hot-swap capability eliminates false
transitions on the bus during power-up or hot insertion.
The MAX14840E features symmetrical fail-safe and larg-
er receiver hysteresis, providing improved noise rejec-
tion and improved recovered signals in high-speed and
long cable applications. The MAX14841E has true fail-
safe receiver inputs guaranteeing a logic-high receiver
output when inputs are shorted or open. All devices have
a 1-unit load receiver input impedance, allowing up to 32
transceivers on the bus.
The MAX14840E/MAX14841E transceivers draw 1.5mA
(typ) supply current when unloaded or when fully loaded
with the drivers disabled.
Symmetrical Fail Safe (MAX14840E)
At high data rates and with long cable lengths, the signal
at the end of the cable is attenuated and distorted due to
the lowpass characteristic of the transmission line. Under
these conditions, fail-safe RS-485 receivers, which have
offset threshold voltages, produce recovered signals
with uneven mark-space ratios. The MAX14840E has
symmetrical receiver thresholds, as shown in Figure 9.
This produces near even mark-space ratios at the
receiver’s output (RO). The MAX14840E also has higher
receiver hysteresis than the MAX14841E and most other
RS-485 transceivers. This results in higher receiver noise
tolerance.
Symmetrical fail safe means that the receiver’s output
(RO) remains at the same logic state that it was before
the differential input voltage VOD went to 0V. Under
normal conditions, where UART signaling is used, this
means that the state on the line prior to all drivers being
disabled is a logic-high (i.e., a UART STOP bit).
True Fail Safe (MAX14841E)
The MAX14841E guarantees a logic-high receiver output
when the receiver inputs are shorted or open or when
they are connected to a terminated transmission line
with all drivers disabled. This is the case if the receiver
input threshold is between -10mV and -200mV. RO is
logic-high if the differential receiver input voltage VOD is
greater than or equal to -10mV.
Hot-Swap Capability
Hot-Swap Inputs
When circuit boards are inserted into a hot or powered
backplane, disturbances to the enable inputs and differ­
ential receiver inputs can lead to data errors. Upon initial
circuit board insertion, the processor undergoes its pow­er-
up sequence. During this period, the processor out­put
drivers are high impedance and are unable to drive
the DE and RE inputs of the MAX14840E/MAX14841E
to a defined logic level. Leakage currents up to 10FA
from the high-impedance output of a controller could
cause DE and RE to drift to an incorrect logic state.
Additionally, parasitic circuit board capacitance could
cause coupling of VCC or GND to DE and RE. These
factors could improperly enable the driver or receiver.
However, the MAX14840E/MAX14841E have hot-swap
inputs that avoid these potential problems.
When VCC rises, an internal pulldown circuit holds DE
low and RE high. After the initial power-up sequence,
the pulldown circuit becomes transparent, resetting the
hot-swap-tolerable inputs.
RO
-200mV
-10mV +10mV
+200mV
V_OD
VTHF
VTHP
VTHP
Figure 9. Symmetrical Hysteresis
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