MAX11041 Datasheet, PDF (12/19 Pages) Maxim Integrated Products – Wired Remote Controllers

Wired Remote Controllers
Table 5. Required Resistor Set for the MAX11042
KEY
0
1
2
3
4
5
Jack inserted
Jack removed
STANDARD 1%
RESISTOR VALUE (Ω)
0
7320
15400
28700
54900
133000
130000
∞
FIFO RESISTOR CODE
0
1
2
3
4
5
6
7
FUNCTION
Previous
Next
Play/pause
Stop
Volume up
Volume down
Jack inserted
Jack removed
Bit Transfer
One data bit is transferred during each SCL clock cycle.
The data on SDA must remain stable during the high
period of the SCL clock pulse. Changes in SDA while
SCL is high and stable are considered control signals
(see the START and STOP Conditions section). Both
SDA and SCL remain high when the bus is not active.
START and STOP Conditions
The master initiates a transmission with a START condi-
tion (S), a high-to-low transition on SDA while SCL is
high. The master terminates a transmission with a STOP
condition (P), a low-to-high transition on SDA while SCL
is high (see Figure 7).
Acknowledge Bits
Data transfers are acknowledged with an acknowledge
bit (ACK) or a not-acknowledge bit (NACK). Both the
master and the MAX11041/MAX11042 generate ACK
bits. To generate an ACK, pull SDA low before the ris-
ing edge of the ninth clock pulse and keep it low during
the high period of the ninth clock pulse (see Figure 8).
To generate a NACK, leave SDA high before the rising
edge of the ninth clock pulse and keep it high for the
duration of the ninth clock pulse. Monitoring NACK bits
allows for detection of unsuccessful data transfers. The
master can also use NACK bits to interrupt the current
data transfer to start another data transfer. If the master
uses NACK during a read from the FIFO, the FIFO word
pointer is not incremented and the next FIFO read pro-
duces the same FIFO word. Thus, the master must pro-
vide the ACK bit to advance the FIFO word pointer.
Applications Information
Required Resistor Set
Tables 4 and 5 show the required resistor sets for 30
and six key implementations. Resistors must have a 1%
tolerance.
Jack Insertion/Removal Detection
During jack insertion there may be several
false key entries written to the FIFO. When a jack inser-
tion/removal is detected, it is necessary to read the
FIFO repeatedly until the final change in jack state is
located (see Figure 9).
Extended Keypresses
In certain applications, a key triggers different events
depending on the duration of the keypress, simultane-
ous keypresses, or a specific order of keypresses.
Long Keypress Detection
In some applications, the duration of the keypress
determines the event triggered. For example, TALK
dials the entered phone number normally and initiates
voice dialing if it is held down. A second common use
of holding a key down is to generate a continuous
stream of events, such as the volume control or
fast forward.
Simultaneous Keypress Detection
Certain applications require the detection of
simultaneous keypresses, such as <SHIFT+KEY> and
<FUNCTION+KEY> combinations. This is done in
software. For instance, the µP detects the SHIFT key is
being pressed. When the µP detects an additional key-
press instead of a key release, it knows the corre-
sponding code is a result of two resistors
in parallel.
12 ______________________________________________________________________________________