MAX1678 Datasheet, PDF (11/12 Pages) Maxim Integrated Products – 1-Cell to 2-Cell, Low-Noise, High-Efficiency, Step-Up DC-DC Converter

1-Cell to 2-Cell, Low-Noise,
High-Efficiency, Step-Up DC-DC Converter
Capacitor Selection
Choose input and output capacitors to service input
and output peak currents with acceptable voltage rip-
ple. Capacitor ESR is a major contributor to output rip-
ple (usually more than 60%). A 10µF, ceramic output
filter capacitor typically provides 50mV output ripple
when stepping up from 1.3V to 3.3V at 20mA. Low input
to output voltage differences (i.e., 2 cells to 3.3V)
require higher capacitor values (10µF to 47µF).
The input filter capacitor (C_IN) also reduces peak cur-
rents drawn from the battery and improves efficiency.
Low-ESR capacitors are recommended. Ceramic
capacitors have the lowest ESR, but low-ESR tantalums
represent a good balance between cost and perfor-
mance. Low-ESR aluminum electrolytic capacitors are
tolerable, and standard aluminum electrolytic capaci-
tors should be avoided. Capacitance and ESR variation
over temperature need to be taken into consideration
for best performance in applications with wide operat-
ing temperature ranges. Table 2 lists suggested capac-
itors and suppliers.
Minimizing Noise and Voltage Ripple
EMI and output voltage ripple can be minimized by fol-
lowing these simple design rules:
1) Place the DC-DC converter and digital circuitry on
the opposite corner of the PC board from sensitive
RF and analog input stages.
2) Use a closed-core inductor, such as toroid or
shielded bobbin, to minimize fringe magnetic fields.
3) Choose the largest inductor value that satisfies the
load requirement, to minimize peak switching cur-
rent and the resulting ripple and noise.
4) Use low-ESR input and output filter capacitors.
5) Follow sound circuit-board layout and grounding
rules (see the PC Board Layout and Grounding sec-
tion).
PC Board Layout and Grounding
High switching frequencies and large peak currents
make PC board layout an important part of design.
Poor design can result in excessive EMI on the feed-
back paths and voltage gradients in the ground plane.
Both of these factors can result in instability or regula-
tion errors. The OUT pin must be bypassed directly to
GND, as close to the IC as possible (within 0.2 inches
or 5mm).
Place power components—such as the MAX1678,
inductor, input filter capacitor, and output filter capaci-
tor—as close together as possible. Keep their traces
short, direct, and wide (≥50 mil or 1.25mm), and place
their ground pins close together in a star-ground con-
figuration. Keep the extra copper on the board and
integrate it into ground as a pseudo-ground plane. On
multilayer boards, route the star ground using compo-
nent-side copper fill, then connect it to the internal
ground plane using vias.
Place the external voltage-feedback network very close
to the FB pin (within 0.2 inches or 5mm). Noisy traces,
such as from the LX pin, should be kept away from the
voltage-feedback network and separated from it using
grounded copper. The MAX1678 evaluation kit manual
shows an example PC board layout, which includes a
pseudo-ground plane.
Table 2. Recommended Surface-Mount Capacitor Manufacturers
VALUE
(µF)
DESCRIPTION
MANUFACTURER
4.7 to 47
595D-series tantalum
TAJ, TPS-series tantalum
Sprague
AVX
TDK
4.7 to 10
X7R ceramic
AVX
4.7 to 22
X7R ceramic
Taiyo Yuden
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