MAX1157 Datasheet, PDF (11/15 Pages) Maxim Integrated Products – 14-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range

14-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
OUTPUT CODE
11 . . . 111
11 . . . 110
11 . . . 101
INPUT RANGE = 0 TO +10V
FULL-SCALE
TRANSITION
FULL-SCALE RANGE
(FSR) = +10V
00 . . . 011
00 . . . 010
00 . . . 001
00 . . . 000
0123
1LSB = ^{FSR x VREF}
16384 x 4.096
16382 16384
16383
INPUT VOLTAGE (LSB)
Figure 8. MAX1157 Transfer Function
OUTPUT CODE
11 . . . 1111
11 . . . 1110
11 . . . 1101
INPUT RANGE = -10V TO +10V
FULL-SCALE
TRANSITION
10 . . . 0001
10 . . . 0000
FULL-SCALE RANGE
(FSR) = +20V
01 . . . 1111
00 . . . 0011
1LSB = ^{FSR x VREF}
16384 x 4.096
00 . . . 0010
00 . . . 0001
00 . . . 0000
-8192 -8190
-8191 -8189
0
-1 +1
+8190 +8192
+8191
INPUT VOLTAGE (LSB)
Figure 9. MAX1159 Transfer Function
OUTPUT CODE
11 . . . 1111
11 . . . 1110
11 . . . 1101
INPUT RANGE = -5V TO +5V
FULL-SCALE
TRANSITION
10 . . . 0001
10 . . . 0000
FULL-SCALE RANGE
(FSR) = +10V
01 . . . 1111
00 . . . 0011
1LSB = ^{FSR x VREF}
16384 x 4.096
00 . . . 0010
00 . . . 0001
00 . . . 0000
-8192 -8190
-8191 -8189
0
-1 +1
+8190 +8192
+8191
INPUT VOLTAGE (LSB)
Figure 10. MAX1175 Transfer Function
Transfer Function
Figures 8, 9, and 10 show the MAX1157/MAX1159/
MAX1175’s output transfer functions. The MAX1159
and MAX1175 outputs are coded in offset binary, while
the MAX1157 is coded on standard binary.
Input Buffer
Most applications require an input buffer amplifier to
achieve 14-bit accuracy and prevent loading the
source. Switch the channels immediately after acquisi-
tion, rather than near the end of or after a conversion
when the input signal is multiplexed. This allows more
time for the input buffer amplifier to respond to a large
step-change in input signal. The input amplifier must
have a high enough slew rate to complete the required
output voltage change before the beginning of the
acquisition time. Figure 11 shows an example of this
circuit using the MAX427.
Figures 12a and 12b show how the MAX1175 and
MAX1159 analog input current varies depending on
whether the chip is operating or powered down. The
part is fully powered down between conversions if the
voltage at R/C is set high during the second falling
edge of CS. The input current abruptly steps to the
powered up value at the start of acquisition. This step
in the input current can disrupt the ADC input, depend-
ing on the driving circuit’s output impedance at high
frequencies. If the driving circuit cannot fully settle by
the end of acquisition time, the accuracy of the system
can be compromised. To avoid this situation, increase
the acquisition time, use a driving circuit that can settle
within t_ACQ, or leave the MAX1175/MAX1159 powered
up by setting the voltage at R/C low during the second
falling edge of CS.
Layout, Grounding, and Bypassing
For best performance, use printed circuit (PC) boards.
Do not run analog and digital lines parallel to each
other, and do not lay out digital signal paths under-
neath the ADC package. Use separate analog and dig-
ital ground planes with only one point connecting the
two ground systems (analog and digital) as close to the
device as possible.
Route digital signals far away from sensitive analog and
reference inputs. If digital lines must cross analog lines,
do so at right angles to minimize coupling digital noise
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