MAXQ613 Datasheet, PDF (10/28 Pages) Maxim Integrated Products – 16-Bit Microcontroller with Infrared Module

16-Bit Microcontroller with Infrared Module
BARE DIE
7
8
9
10
11
12
17
18
22
23
24
26
28
30
31
32
33
34
—
—
Pin Description (continued)
PIN
32 TQFN-
EP
7
8
9
10
11
12
16
17
20
21
—
—
—
—
24
25
26
27
23
—
44 TQFN-
EP
NAME
FUNCTION
9
P0.6/TBB0/
INT14
P0.6
Type B Timer 0 Pin B/INT14
10
P0.7/TBB1/
INT15
P0.7
Type B Timer 1 Pin B/INT15
Port 1 General-Purpose, Digital I/O Pins with Interrupt Capability. These
port pins function as general-purpose I/O pins with their input and
output states controlled by the PD1, PO1, and PI1 registers. All port pins
default to high-impedance mode after a reset. Software must configure
these pins after release from reset to remove the high-impedance
condition. All external interrupts must be enabled from software before
they can be used.
11
P1.0/INT0
12
P1.1/INT1
13
P1.2/INT2
14
P1.3/INT3
21
P1.4/INT4
22
P1.5/INT5
25
P1.6/INT6
26
P1.7/INT7
GPIO PORT PIN
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
EXTERNAL INTERRUPT
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
Port 2 General-Purpose, Digital I/O Pins. These port pins function as
general-purpose I/O pins with their input and output states controlled
by the PD2, PO2, and PI2 registers. All port pins default to high-
impedance mode after a reset. Software must configure these pins after
release from reset to remove the high-impedance condition. All special
functions must be enabled from software before they can be used.
GPIO PORT PIN
27
P2.0/MOSI
P2.0
29
P2.1/MISO
P2.1
32
P2.2/SCLK
P2.2
33
P2.3/SSEL
P2.3
34
P2.4/TCK
P2.4
35
P2.5/TDI
P2.5
38
P2.6/TMS
P2.6
39
P2.7/TDO
P2.7
NO CONNECTION PINS
SPECIAL FUNCTION
SPI: Master Out-Slave In
SPI: Master In-Slave Out
SPI: Slave Clock
SPI: Active-Low Slave Select
JTAG: Test Clock
JTAG: Test Data In
JTAG: Test Mode Select
JTAG: Test Data Out
2, 4, 15, 16,
30, 31, 36,
37
N.C.
No Connection. Not internally connected.
—
EP
Exposed Pad. Connect EP directly to the ground plane.
10