English
Language : 

MAX1608 Datasheet, PDF (10/16 Pages) Maxim Integrated Products – Octal SMBus-to-Parallel I/O Expanders
Octal SMBus-to-Parallel I/O Expanders
LAST BIT
CLOCKED
INTO SLAVE**
ACKNOWLEDGE
BIT CLOCKED
INTO MASTER
SCL
SLAVE PULLING
SDA
SDA LOW
tDH:DAT
tDH:DAT
STOP
REGISTERS
UPDATED*
IO_TRANSITION
IO_
tSCL:IO
*NDR#, SDR# ARE LOADED. RAP, SPOR ARE INITIATED. RSB IS SAMPLED.
**DURING A RECEIVE-BYTE PROTOCOL, CORRESPONDS TO THE R/W BIT. DURING A
READ/WRITE-BYTE PROTOCOL, CORRESPONDS TO LAST BIT OF DATA.
Figure 5. Registers/IO_ Update Timing Diagram
configurations asynchronously, eliminating latencies
introduced by the serial bus.
ALERT
The MAX1608/MAX1609 can generate hardware inter-
rupts whenever the logic states of the IO_ pins change
or when thermal shutdown occurs. Interrupts are sig-
naled on the ALERT pin. The IO_ interrupts can be
masked individually through the mask registers.
Registers NDR2 and SDR2 mask the IO_ rising-edge
interrupts, while NDR3 and SDR3 mask the IO_ falling-
edge interrupts. The power-on-reset state masks all
interrupts (Tables 4 and 5).
The thermal-shutdown protection also generates an
interrupt. This interrupt cannot be masked (see Thermal
Shutdown section). An interrupt can be cleared with a
SPOR or an Alert Response. However, after an interrupt
has occurred, masking will not clear it.
Alert Response Address (0b00011001)
The alert response (interrupt pointer) address provides
quick fault identification for simple slave devices that
cannot initiate communication as a bus master. When a
slave device generates an interrupt, the host (bus mas-
ter) interrogates the bus slave devices through a special
receive-byte operation that includes the alert response
address (0x19). The offending slave device returns its
own address during this receive-byte operation.
The interrupt pointer address can activate several dif-
ferent slave devices simultaneously. If more than one
Table 2. Command-Byte/Register Assignment
REGISTER
NDR1
NDR2
NDR3
SDR1
SDR2
SDR3
RSB
RAP
SPOR
MFID
COMMAND
00h
01h
02h
03h
04h
05h
06h
07h
08h
FEh
POR STATE
MAX1608
MAX1609
0000 0000
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
0000 0000
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
—
—
—
—
—
—
4Dh
4Dh
FUNCTION
Normal Data Register 1. Sets the IO_ states.
Normal Data Register 2. Masks the L/H interrupt.
Normal Data Register 3. Masks the H/L interrupt.
Suspend Data Register 1. Sets the IO_ states.
Suspend Data Register 2. Masks the L/H interrupt.
Suspend Data Register 3. Masks the H/L interrupt.
IO_ Status Data Register. Read pin state.
Sample the address pins.
Execute software POR and samples address pins.
Read manufacturer ID (ASCII code for "M"axim).
10 ______________________________________________________________________________________