MAX14982 Datasheet, PDF (10/12 Pages) Maxim Integrated Products – Test Equipment

MAX14982
All-In-One Ruggedized 5GT/s 2:1/1:2 PCIe Mux and
Redriver with Equalization
Typical Application Circuit
Tx
PCIe
HOST
Rx
OUTA
IN
OUTB
MAX14982
INA
OUT
INB
Tx
PCIe
DEVICE A
Rx
Tx
PCIe
DEVICE B
Rx
Applications Information
Layout
Circuit board layout and design can significantly affect the
performance of the MAX14982. Use good high-frequency
design techniques, including minimizing ground induc-
tance and using controlled-impedance transmission lines
on data signals. It is recommended to run receive and
transmit on different layers to minimize crosstalk and to
place 1FF and 0.01FF power-supply bypass capacitors
in parallel as close to V_CC as possible on each V_CC pin.
Always connect V_CC to a power plane.
Exposed Pad Package
The exposed-pad, 42-pin TQFN package incorporates
features that provide a very low thermal resistance path
for heat removal from the IC. The exposed pad on the
MAX14982 must be soldered to the circuit board ground
plane for proper thermal performance. For more informa-
tion on exposed-pad packages, refer to Application Note
862: HFAN-08.1: Thermal Considerations of QFN and
Other Exposed-Paddle Packages.
Power-Supply Sequencing
Caution: Do not exceed the absolute maximum rat-
ings because stresses beyond the listed ratings may
cause permanent damage to the device.
Proper power-supply sequencing is recommended for all
devices. Always apply GND then V_CC before applying
signals, especially if the signal is not current limited.
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