MAX1460 Datasheet, PDF (10/20 Pages) Maxim Integrated Products – Low-Power, 16-Bit Smart ADC

Low-Power, 16-Bit Smart ADC
Table 4. Test System Commands
COMMAND
Write a calibration coefficient into a DSP register.
Block-Erase the entire EEPROM (writes “0” to all 128 bits).
Write “1” to a single EEPROM bit.
NOOP (NO-OPeration)
Start Conversion command. The registers are not updated with EEPROM values.
SDIO and SDO are enabled as DSP outputs.
Start Conversion command. The registers are updated with EEPROM values. SDIO
and SDO are enabled as DSP outputs.
Start Conversion command. The registers are not updated with EEPROM values.
SDIO and SDO are disabled.
Start Conversion command. The registers are updated with EEPROM values. SDIO
and SDO are disabled.
Reserved
HEX CODE
1 hex
4 hex
2 hex
0 hex
8 hex
A hex
C hex
E hex
3, 5, 6, 7, 9, B, D, F hex
C3 C2 C1 C0
0001
0100
0010
0000
1000
1010
1100
1110
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Table 5. DSP Calibration Coefficient Registers
COEFFICIENT
Gain
G₁
G₂
Of₀
Of₁
Of₂
D_OFF
REGISTER
ADDRESS
1
2
3
4
5
6
7
FUNCTION
Gain correction
Linear TC gain
Quadratic TC gain
Offset correction
Linear TC offset
Quadratic TC offset
Output midscale pedestal
RANGE
-32768 to +32767
-1.0 to +0.99997
-1.0 to +0.99997
-1.0 to +0.99997
-1.0 to +0.99997
-1.0 to +0.99997
-32768 to +32767
FORMAT
Integer
Fraction
Fraction
Fraction
Fraction
Fraction
Integer
Writing to the DSP Registers
Command 1 hex writes calibration coefficients from the
test system directly into the DSP registers. Tester com-
mands 8 hex and C hex cause the MAX1460 to start a
conversion using the calibration coefficients in the reg-
isters. This direct use of the registers speeds calibra-
tion and compensation because it does not require
EEPROM write-access time. Bringing RESET low clears
the DSP registers, so the test system should always
write to the registers and start a conversion in a single
command timing sequence.
As shown in Table 5, seven registers hold the calibra-
tion coefficients of the characteristic equation [D_OUT =
Gain (1+G₁T + G₂T²) (Signal + Of₀ + Of₁T + Of₂T²) +
D_OFF] implemented by the MAX1460 DSP. All of the
registers are 16-bit, two’s complement coding format.
When a register is interpreted as an integer, the deci-
mal range is from -32768 (8000 hex) to +32767 (7FFF
hex). Fractional coefficient values range from -1.0
(8000 hex) to +0.99997 (7FFF hex).
The register at address 0 is called the Configuration
Register. It holds the coarse offset, PGA gain, Op Amp
Power-Down, temperature-sensor offset, repeat mode,
and reserved bits, as shown in Table 6. The functionali-
ty of the coarse offset, PGA gain, and temperature-sen-
sor bits are described in the Analog Front End section.
The Op Amp Power-Down bit enables the uncommitted
op amp when set. The repeat-mode bit is tested by the
last instruction of the DSP microcode, and, if set, imme-
diately initiates another conversion cycle. The Maxim
reserved bits should not be altered.
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