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MAX9384 Datasheet, PDF (1/10 Pages) Maxim Integrated Products – ECL/PECL Dual Differential 2:1 Multiplexer
19-2484; Rev 0; 7/02
ECL/PECL Dual Differential 2:1 Multiplexer
General Description
The MAX9384 fully differential dual 2:1 multiplexer
(mux) features extremely low propagation delay (560ps
max) and output-to-output skew (40ps max). The
device is ideal for clock and data multiplexing applica-
tions. The two 2:1 muxes are controlled individually or
simultaneously through mux select inputs COM_SEL,
SEL0, and SEL1. The mux select inputs are compatible
with ECL/PECL logic, and are referenced to on-chip
outputs VBB0 and VBB1, nominally VCC - 1.33V.
The differential inputs D, D can be configured to accept
a single-ended signal when the unused complementary
input is connected to the on-chip supply output VBB as
a reference voltage. All the differential inputs have bias
and clamp circuits that force the outputs to a low
default when the inputs are left open or at VEE. The sin-
gle-ended mux select inputs have pulldowns to VEE,
providing low default inputs when the select inputs are
left open.
The device operates with a wide supply range (VCC -
VEE) of +3.0V to +5.5V for PECL or -3.0V to -5.5V for
ECL, and is pin compatible with the MC100LVEL56 and
MC100EL56. The MAX9384 is offered in a 20-pin wide
SO package, and is specified for operation from -40°C
to +85°C.
Features
o 40psP-P Deterministic Jitter
o 440ps Differential Propagation Delay
o 12ps Output-to-Output Skew
o Individual and Common Select
o +3.0V to +5.5V Supplies for Differential
LVPECL/PECL
o -3.0V to -5.5V Supplies for Differential LVECL/ECL
o Outputs Low for Inputs Open or at VEE
o >2kV ESD Protection (Human Body Model)
o Pin Compatible with MC100LVEL56 and
MC100EL56
PART
MAX9384EWP
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
20 Wide SO
Applications
High-Speed Telecom, Datacom Applications
Central-Office Backplane Clock Distribution
Access Multiplexers (DSLAM/DLC)
Functional Diagram appears at end of data sheet.
Pin Configuration
TOP VIEW
D0a 1
DOa 2
VBB0 3
D0b 4
DOb 5
D1a 6
D1a 7
VBB1 8
D1b 9
D1b 10
MAX9384
20 VCC
19 Q0
18 Q0
17 SEL0
16 COM_SEL
15 SEL1
14 VCC
13 Q1
12 Q1
11 VEE
SO
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