MAX9322 Datasheet, PDF (1/13 Pages) Maxim Integrated Products – LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver

19-2544; Rev 1; 12/02
LVECL/LVPECL 1:15 Differential
Divide-by-1/Divide-by-2 Clock Driver
General Description
The MAX9322 low-skew 1:15 differential clock driver
reproduces or divides one of two differential input clocks
at 15 differential outputs. An input multiplexer selects from
one of two input clocks with input switching frequency in
excess of 1.0GHz. The 15 outputs are arranged in four
banks with 2, 3, 4, and 6 outputs, respectively. Each
output bank is individually programmable to provide a
divide-by-1 or divide-by-2 frequency function.
The MAX9322 operates in LVPECL systems with a
+2.375V to +3.8V supply or in LVECL systems with a
-2.375V to -3.8V supply. A V_BB reference output pro-
vides compatibility with single-ended clock input sig-
nals and a master reset input provides a simultaneous
reset on all outputs.
The MAX9322 is available in 52-pin TQFP and 68-pin
QFN packages and is specified for operation over
-40°C to +85°C. For 1:10 clock drivers, refer to the
MAX9311/MAX9313 data sheet. For 1:5 clock drivers,
refer to the MAX9316 data sheet.
Applications
Precision Clock Distribution
Low-Jitter Data Repeaters
Central-Office Backplane Clock Distribution
DSLAM Backplane
Base Stations
ATE
Typical Operating Circuit
MAX9322
Q_
Q_
Z_O = 50Ω
Z_O = 50Ω
RECEIVER
50Ω 50Ω
V_TT = V_CC - 2.0V
Features
o 1.2ps (RMS) Maximum Random Jitter
o 300mV Differential Output at 1.0GHz
o 900ps Propagation Delay
o Selectable Divide-by-1 or Divide-by-2 Frequency
Outputs
o Multiplexed 2:1 Input Function
o LVECL Operation from V_EE = -2.375V to -3.8V
o LVPECL Operation from V_CC = +2.375V to +3.8V
o ESD Protection: > 2kV Human Body Model
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
MAX9322ECY
-40°C to +85°C
52 TQFP
MAX9322ETK*
-40°C to +85°C
68 QFN
*Future product—contact factory for availability.
Pin Configurations
TOP VIEW
52 51 50 49 48 47 46 45 44 43 42 41 40
VCC 1
MR 2
FSELA 3
FSELB 4
CLK0 5
CLK0 6
CLK_SEL 7
CLK1 8
CLK1 9
VBB 10
FSELC 11
FSELD 12
VEE 13
MAX9322
39 VCCO
38 QC0
37 QC0
36 QC1
35 QC1
34 QC2
33 QC2
32 QC3
31 QC3
30 VCCO
29 N.C.
28 N.C.
27 VCCO
14 15 16 17 18 19 20 21 22 23 24 25 26
TQFP
Pin Configurations continued at end of data sheet.
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