MAX9321B Datasheet, PDF (1/7 Pages) Maxim Integrated Products – Differential PECL/ECL/LVPECL/LVECL Receiver/Driver

19-2384; Rev 0; 4/02
Differential PECL/ECL/LVPECL/LVECL
Receiver/Driver
General Description
The MAX9321B low-skew differential receiver/driver is
designed for clock and data distribution. The differen-
tial input can be adapted to accept a single-ended
input by connecting the on-chip V_BB supply to an input
as a reference voltage.
The MAX9321B features ultra-low propagation delay
(172ps) and part-to-part skew (20ps) with 24mA maxi-
mum supply current, making this device ideal for clock
buffering or repeating. For interfacing to differential PECL
and LVPECL signals, these devices operate over a +3.0V
to +5.5V supply range, allowing high-performance clock
and data distribution in systems with a nominal 3.3V or
5.0V supply. For differential ECL and LVECL operation,
this device operates from a -3.0V to -5.5V supply.
The MAX9321B is offered in industry-standard 8-pin SO
and TSSOP packages.
Features
o Improved Second Source of the MC10EP16D
o +3.0V to +5.5V Differential PECL/LVPECL
Operation
o -3.0V to -5.5V Differential ECL/LVECL Operation
o Low 17mA Supply Current
o 20ps Part-to-Part Skew
o 172ps Propagation Delay
o Minimum 300mV Output at 3GHz
o Output Low for Open Input
o ESD Protection >2kV (Human Body Model)
o On-Chip Reference for Single-Ended Input
Precision Clock Buffer
Low-Jitter Data Repeater
Applications
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX9321BESA
-40°C to +85°C 8 SO
MAX9321BEUA*
-40°C to +85°C 8 TSSOP
*Future product—contact factory for availability.
Pin Configuration
D
V_IH
D
V_BB
V_IL
(CONNECTED TO D)
Q
V_OH
V_OH - V_OL
Q
V_OL
Figure 1. Switching with Single-Ended Inputs
N.C. 1
D2
D3
V_BB 4
V_CC
MAX9321B
80kΩ
50kΩ
60kΩ
100kΩ
TSSOP/SO
8 VCC
7Q
6Q
5 VEE
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