MAX9315 Datasheet, PDF (1/11 Pages) Maxim Integrated Products – 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver

19-2220; Rev 1; 11/04
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1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
General Description
The MAX9315 low-skew, 1-to-5 differential driver is
designed for clock and data distribution. This device
allows selection between two inputs. The selected input
is reproduced at five differential outputs. The differential
inputs can be adapted to accept a single-ended input
by connecting the on-chip V_BB supply to one input as a
reference voltage.
The MAX9315 features low output-to-output skew
(20ps), making it ideal for clock and data distribution
across a backplane or a board. For interfacing to differ-
ential HSTL and LVPECL signals, this device operates
over a +2.375V to +3.8V supply range, allowing high-
performance clock or data distribution in systems with a
nominal +2.5V or +3.3V supply. For differential LVECL
operation, this device operates with a -2.375V to -3.8V
supply.
The MAX9315 is offered in a space-saving 20-pin
TSSOP package.
Features
♦ +2.375V to +3.8V Supply for Differential
HSTL/LVPECL Operation
♦ -2.375V to -3.8V Supply for Differential LVECL
Operation
♦ Two Selectable Differential Inputs
♦ Synchronous Output Enable/Disable
♦ 20ps Output-to-Output Skew
♦ 360ps Propagation Delay
♦ Guaranteed 400mV Differential Output at 1.5GHz
♦ On-Chip Reference for Single-Ended Inputs
♦ Input Biased Low when Left Open
♦ Pin Compatible with MC100LVEP14
Applications
Precision Clock Distribution
Low-Jitter Data Repeater
Data and Clock Driver and Buffer
Central Office Backplane Clock Distribution
DSLAM Backplane
Base Station
ATE
PART
MAX9315EUP
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
20 TSSOP
Pin Configuration
Typical Application Circuit
MAX9315
Q_
Z_O = 50Ω
Z_O = 50Ω
Q_
RECEIVER
50Ω 50Ω
V_TT = V_CC - 2.0V
Functional Diagram appears at end of data sheet.
TOP VIEW
QO 1
Q0 2
Q1 3
Q1 4
Q2 5
Q2 6
Q3 7
Q3 8
Q4 9
Q4 10
MAX9315
20 V_CC
Q ^{D 19 EN}
18 V_CC
17 CLK1
16 CLK1
15 V_BB
14 CLK0
13 CLK0
12 SEL
11 V_EE
TSSOP
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