MAX9209 Datasheet, PDF (1/20 Pages) Maxim Integrated Products – Programmable DC-Balanced 21-Bit Serializers

19-2828; Rev 2; 2/04
Programmable DC-Balanced
21-Bit Serializers
General Description
The MAX9209/MAX9211/MAX9213/MAX9215 serialize
21 bits of LVTTL/LVCMOS parallel input data to three
LVDS outputs. A parallel rate clock on a fourth LVDS
output provides timing for deserialization.
The MAX9209/MAX9211/MAX9213/MAX9215 feature
programmable DC balance, which allows isolation
between the serializer and deserializer using AC-cou-
pling. The DC balance circuits on each channel code
the data, limiting the imbalance of transmitted ones and
zeros to a defined range. The companion MAX9210/
MAX9212/MAX9214/MAX9216 deserializers decode the
data. When DC balance is not programmed, the serial-
izers are compatible with non-DC-balanced, 21-bit seri-
alizers like the DS90CR215 and DS90CR217.
Two frequency ranges and two DC-balance default
conditions are available for maximum replacement flexi-
bility and compatibility with existing non-DC-balanced
serializers.
The MAX9209/MAX9211/MAX9213/MAX9215 are avail-
able in TSSOP and space-saving thin QFN packages,
and operate from a single +3.3V supply over the -40°C
to +85°C temperature range.
Applications
Automotive Navigation Systems
Automotive DVD Entertainment Systems
Digital Copiers
Laser Printers
Functional Diagram
MAX9209
MAX9211
MAX9213
MAX9215
LVDS DRIVER 0
TxOUT0+
TxIN 0 - 20
21
TIMING
CONTROL
PARALLEL-TO- _{LVDS DRIVER 1}
SERIAL
TxOUT0-
TxOUT1+
CONVERTER
DCB/NC
AND
DC-BALANCE
TxOUT1-
LOGIC
LVDS DRIVER 2
TxOUT2+
TxCLK IN
PLL
7X OR 9X
CLOCK
GENERATOR
LVDS CLK
TxOUT2-
TxCLK OUT+
TxCLK OUT-
Features
♦ Programmable DC-Balanced or Non-DC-Balanced
Operation
♦ DC Balance Allows AC-Coupling for Ground-Shift
Tolerance
♦ As Low as 8MHz Operation
♦ Pin Compatible with DS90CR215 and DS90CR217
in Non-DC-Balanced Mode
♦ Integrated 110Ω (DC-Balanced) and 410Ω (Non-
DC-Balanced) Output Resistors
♦ 5V Tolerant LVTTL/LVCMOS Data Inputs
♦ PLL Requires No External Components
♦ Up to 1.785Gbps Throughput
♦ LVDS Outputs Meet IEC 61000-4-2 and ISO 10605
Requirements
♦ LVDS Outputs Conform to ANSI TIA/EIA-644
LVDS Standard
♦ Low-Profile 48-Lead TSSOP and Space-Saving
QFN Packages
♦ -40°C to +85°C Operating Temperature Range
♦ +3.3V Supply
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX9209ETM*
-40°C to +85°C 48 Thin QFN-EP**
MAX9209EUM
-40°C to +85°C 48 TSSOP
MAX9211ETM*
-40°C to +85°C 48 Thin QFN-EP**
MAX9211EUM*
-40°C to +85°C 48 TSSOP
MAX9213ETM*
-40°C to +85°C 48 Thin QFN-EP**
MAX9213EUM
-40°C to +85°C 48 TSSOP
MAX9215ETM*
-40°C to +85°C 48 Thin QFN-EP**
MAX9215EUM*
-40°C to +85°C 48 TSSOP
*Future product—contact factory for availability.
**EP = Exposed pad.
Pin Configurations appear at end of data sheet.
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