MAX9163 Datasheet, PDF (1/11 Pages) Maxim Integrated Products – Bus LVDS 3.3V Single Transceiver

19-2689; Rev 0; 1/03
Bus LVDS 3.3V Single Transceiver
General Description
The MAX9163 high-speed bus low-voltage differential
signaling (BLVDS) transceiver is designed specifically
for heavily loaded multipoint bus applications. The
MAX9163 operates from a single 3.3V power supply, and
is pin compatible with the DS92LV010A. The transceiver
consists of one differential BLVDS line driver and one
LVDS receiver. The driver output and receiver input are
connected internally to minimize bus loading. The indi-
vidual enable logic inputs (DE, RE) are used to enable
the driver or the receiver.
The MAX9163 driver output uses a current-steering
configuration to generate a 9mA (typ) drive current. The
driver accepts a single-ended input and translates it to
a differential output level of 243mV (typ) into 27Ω at
speeds up to 200Mbps. The MAX9163 receiver detects
a differential input as low as 100mV and translates it to
a single-ended output at speeds up to 200Mbps. The
receiver input features a fail-safe circuit that sets the
receiver output high when the receiver inputs are
undriven and open, terminated, or shorted.
The MAX9163 is offered in an 8-lead SO package, and
is specified for operation from -40°C to +85°C.
Features
o BLVDS Signaling
o 3.3V Operation
o Low-Power CMOS Design
o 200Mbps Data-Signaling Rate
o ±1V Common-Mode Range
o ±100mV Receiver Sensitivity
o Flow-Through Pinout
o Receiver Output High for Undriven Open,
Short, or Terminated Input
o 8-Lead SO Package
PART
MAX9163ESA
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
8 SO
Applications
Cell-Phone Base Stations
Add/Drop Muxes
Digital Cross-Connects
DSLAMs
Network Switches/Routers
Backplane Interconnect
Clock Distribution
Pin Configuration
TOP VIEW
DE 1
DIN 2
ROUT 3
GND 4
MAX9163
SO
8 V_CC
7 DO+/RI+
6 DO-/RI-
5 RE
Typical Application Circuit appears at end of data sheet.
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