MAX9159 Datasheet, PDF (1/7 Pages) Maxim Integrated Products – Dual LVDS Line Receiver

19-2274; Rev 0; 1/02
Dual LVDS Line Receiver
General Description
The MAX9159 dual low-voltage differential signaling
(LVDS) receiver is ideal for applications requiring high
speed, low power, and low noise. The MAX9159 is pin
compatible with the SN65LVDS9637. The MAX9159
conforms to the ANSI TIA/EIA-644 LVDS standard and
converts LVDS to LVTTL-compatible outputs. A fail-safe
feature sets the output high when the inputs are undriv-
en and open, terminated, or shorted. The MAX9159 is
available in an 8-pin SO package and fully specified for
the -40°C to +85°C extended temperature range.
Refer to the MAX9111/MAX9113 data sheet for higher
performance single/dual LVDS line receivers in SOT23
and SO packages. Refer to the MAX9110/MAX9112
data sheet for single/dual LVDS line drivers in SOT23
and SO packages.
Applications
Network Switches/Routers
Telecom Switching Equipment
Cellular Phone Base Stations
Digital Copiers
LCD Displays
Backplane Interconnect
Clock Distribution
Features
o Pin Compatible with SN65LVDS9637
o Fail-Safe Circuit Sets Output High for Undriven
Inputs
o Conforms to ANSI TIA/EIA-644 Standard
o Single 3.3V Supply
o Designed for Data Rates up to 400Mbps
o ±100mV (max) Differential Input Threshold
o 2.2ns (typ) Propagation Delay
o 41mW (typ) Power Dissipation per Receiver at
200MHz
o ±8kV ESD Protection for LVDS Inputs
o Low-Voltage TTL (LVTTL) Logic Output Levels
PART
MAX9159ESA
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
8 SO
Typical Operating Circuit
3.3V
DIN_
DRIVER
3.3V
0.001µF
0.1µF
_A
0.001µF
0.1µF
R_T = 100Ω
RECEIVER
_Y
LVDS
_B
MAX9110
MAX9112
MAX9159
TOP VIEW
V_CC 1
1Y 2
2Y 3
GND 4
Pin Configuration
MAX9159
SO
8 1A
7 1B
6 2A
5 2B
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