MAX5891 Datasheet, PDF (1/15 Pages) Maxim Integrated Products – 16-Bit, 600Msps, High-Dynamic-Performance DAC with LVDS Inputs

19-3542; Rev 0; 2/05
EVAALVUAAILTAIOBNLEKIT
16-Bit, 600Msps, High-Dynamic-Performance
DAC with LVDS Inputs
General Description
The MAX5891 advanced 16-bit, 600Msps, digital-to-
analog converter (DAC) meets the demanding perfor-
mance requirements of signal synthesis applications
found in wireless base stations and other communica-
tions applications. Operating from +3.3V and +1.8V
supplies, the MAX5891 DAC supports update rates of
600Msps using high-speed LVDS inputs while consum-
ing only 298mW of power and offers exceptional
dynamic performance such as 80dBc spurious-free
dynamic range (SFDR) at f_OUT = 30MHz.
The MAX5891 utilizes a current-steering architecture that
supports a 2mA to 20mA full-scale output current range,
and produces -2dBm to -22dBm full-scale output signal
levels with a double-terminated 50Ω load. The MAX5891
features an integrated +1.2V bandgap reference and
control amplifier to ensure high-accuracy and low-noise
performance. A separate reference input (REFIO) allows
for the use of an external reference source for optimum
flexibility and improved gain accuracy.
The MAX5891 digital inputs accept LVDS voltage lev-
els, and the flexible clock input can be driven differen-
tially or single-ended, AC- or DC-coupled. The
MAX5891 is available in a 68-pin QFN package with an
exposed paddle (EP) and is specified for the extended
(-40°C to +85°C) temperature range.
Refer to the MAX5890* and MAX5889* data sheets for
pin-compatible 14-bit and 12-bit versions of the
MAX5891.
Applications
Base Stations: Single/Multicarrier UMTS,
CDMA, GSM
Communications: Fixed Broadband Wireless
Access, Point-to-Point Microwave
Direct Digital Synthesis (DDS)
Cable Modem Termination Systems (CMTS)
Automated Test Equipment (ATE)
Instrumentation
Selector Guide
PART
RESOLUTION
(BITS)
UPDATE RATE
(Msps)
LOGIC INPUT
MAX5889*
12
600
LVDS
MAX5890*
14
600
LVDS
MAX5891
16
600
*Future product—contact factory for availability.
LVDS
Features
♦ 600Msps Output Update Rate
♦ Low Noise Spectral Density: -163dBFS/Hz at
f_OUT = 36MHz
♦ Excellent SFDR and IMD Performance
SFDR = 80dBc at f_OUT = 30MHz (to Nyquist)
SFDR = 69dBc at f_OUT = 130MHz (to Nyquist)
IMD = -94dBc at f_OUT = 30MHz
IMD = -77dBc at f_OUT = 130MHz
♦ ACLR = 73dB at f_OUT = 122.88MHz
♦ 2mA to 20mA Full-Scale Output Current
♦ LVDS-Compatible Digital Inputs
♦ On-Chip +1.2V Bandgap Reference
♦ Low 298mW Power Dissipation at 600Msps
♦ Compact (10mm x 10mm) QFN-EP Package
♦ Evaluation Kit Available (MAX5891EVKIT)
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX5891EGK -40°C to +85°C 68 QFN-EP**
**EP = Exposed paddle.
PKG
CODE
G6800-4
Functional Diagram
D0–D15
LVDS DATA
INPUTS
LVDS
RECEIVER
LATCH
MAX5891
OUTP
600MHz
16-BIT DAC
OUTN
CLKP
CLKN
CLK
INTERFACE
+1.2V
REFERENCE
DACREF
REFIO
FSADJ
POWER
PD
DOWN
Pin Configuration appears at end of data sheet.
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