MAX4533 Datasheet, PDF (1/12 Pages) Maxim Integrated Products – Quad, Rail-to-Rail, Fault-Protected, SPDT Analog Switch

19-1452; Rev 0; 4/99
Quad, Rail-to-Rail, Fault-Protected,
SPDT Analog Switch
General Description
The MAX4533 quad, single-pole/double-throw (SPDT),
fault-protected analog switch is pin-compatible with the
industry-standard MAX333 and MAX333A. The MAX4533
features fault-protected inputs and Rail-to-Rail® signal
handling. The normally open (NO_ ) and normally closed
(NC_ ) terminals are protected from overvoltage faults up
to ±25V with power on and up to ±40V with power off.
During a fault condition, NO_ and NC_ become high
impedance with only nanoamperes of leakage current
flowing to the source. In addition, the output (COM_)
clamps to the appropriate polarity supply rail and pro-
vides up to ±10mA of load current. This ensures unam-
biguous rail-to-rail outputs when a fault occurs.
The MAX4533 operates from dual ±4.5V to ±18V power
supplies or a single +9V to +36V supply. All digital inputs
have +0.8V and +2.4V logic thresholds, ensuring both
TTL and CMOS logic compatibility when using ±15V
supplies or a +12V supply. On-resistance is 175Ω max
and is matched between switches to 10Ω max. The off-
leakage current is only 0.5nA at T_A = +25°C and 10nA at
T_A = +85°C.
Applications
Redundant/Backup Systems Portable Instruments
Test Equipment
Communications Systems
Data-Acquisition
Systems
Industrial and Process Control Avionics Systems
Typical Operating Circuit
INPUTS
V1
V2
OUTPUTS
V1 - V2
OSC
IN
MAX4533
V3
V3 - V4
V4
FLYING CAPACITOR LEVEL TRANSLATOR
(2-CHANNEL)
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
† Patent Pending
Features
o Rail-to-Rail Signal Handling
o ±40V Fault Protection with Power Off
±25V Fault Protection with ±15V Supplies
o All Switches Off with Power Off
o No Power-Supply Sequencing Required During
Power-Up or Power-Down
o Output Clamped to Appropriate Supply Voltage
During Fault Condition—No Transition Glitch
o 1kΩ (typ) Output Clamp Resistance During
Overvoltage
o 175Ω (max) Signal Paths with ±15V Supplies
o 20ns (typ) Fault Response Time
o ±4.5V to ±18V Dual Supplies
+9V to +36V Single Supply
o Pin-Compatible with Industry-Standard
MAX333/MAX333A
o TTL/CMOS-Compatible Logic Inputs with ±15V or
Single +9V to +15V Supplies
Ordering Information
PART
TEMP. RANGE PIN-PACKAGE
MAX4533CAP
0°C to +70°C
20 SSOP
MAX4533CSP
0°C to +70°C
20 Wide SO
Ordering Information continued at end of data sheet.
Pin Configuration/
Functional Diagram
TOP VIEW
IN1 ₁
NO1 ₂
COM1 ₃
NC1 ₄
V- ₅
GND 6
NC2 ₇
COM2 ₈
NO2 ₉
IN2 ₁₀
MAX4533
20 ^IN4
19 NO4
18 ^COM4
17 NC4
16 V+
15 N.C.
14 NC3
13 COM3
12 NO3
11 IN3
SSOP/SO/DIP/CERDIP
SWITCHES ARE SHOWN WITH LOGIC "0" INPUT
N.C. = NOT INTERNALLY CONNECTED
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