MAX3950 Datasheet, PDF (1/9 Pages) Maxim Integrated Products – +3.3V, 10.7Gbps 1:16 Deserializer with LVDS Outputs

19-1853; Rev 2; 12/02
+3.3V, 10.7Gbps 1:16 Deserializer
with LVDS Outputs
General Description
The MAX3950 deserializer is ideal for converting
10Gbps serial data to 16-bit-wide, 622Mbps parallel
data in SDH/SONET and DWDM applications.
Operating from a single +3.3V supply, this device
accepts CML serial clock and data inputs and delivers
low-voltage differential-signal (LVDS) clock and data
outputs for interfacing with high-speed digital circuitry.
The MAX3950 is available in the extended temperature
range (-40°C to +85°C) in a 68-pin QFN package. The
typical power dissipation is 900mW.
Applications
SONET/OC-192 SDH/STM-64 Transmission Systems
Add/Drop Multiplexers
Broadband Digital Cross-Connects
Features
o Supports Serial Data Rates Up to 10.7Gbps
o 10Gbps/10.7Gbps Serial to 622Mbps/667Mbps
Parallel Conversion
o Single +3.3V Supply
o 900mW Operating Power
o CML Serial Clock and Data Inputs
o LVDS Parallel Clock and Data Outputs
o -40°C to +85°C Operating Temperature
PART
MAX3950EGK
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
68 QFN
Pin Configuration appears at the end of data sheet.
Typical Application Circuit
10Gbps
IN+
V_CC
10Gbps
OUT+
MAX3920*
TIA
IN-
OUT-
V_CC
10Gbps
IN+
OUT+
V_CC
10Gbps
SDO+
SDI+
SDO-
MAX3925*
AGC AMP
MAX3940*
CDR
IN-
OUT-
SDI-
SCLKO+
SCLKO-
V_CC
PD15+
SD+
PD15-
SD-
PD0+
MAX3950
DESERIALIZER
PD0-
SCLK+
SCLK-
PCLK+
*FUTURE PRODUCTS.
**REQUIRED ONLY IF OVERHEAD CIRCUIT DOES NOT INCLUDE INTERNAL INPUT TERMINATION.
THIS SYMBOL REPRESENTS A TRANSMISSION LINE OF CHARACTERISTIC IMPEDANCE Z_o = 50Ω.
PCLK-
622Mbps
100Ω**
100Ω**
100Ω**
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