MAX3885 Datasheet, PDF (1/8 Pages) Maxim Integrated Products – +3.3V, 2.488Gbps, SDH/SONET 1:16 Deserializer with LVDS Outputs

19-4767; Rev 2; 1/99
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+3.3V, 2.488Gbps, SDH/SONET
1:16 Deserializer with LVDS Outputs
General Description
The MAX3885 deserializer is ideal for converting
2.488Gbps serial data to 16-bit wide, 155Mbps parallel
data in SDH/SONET applications. Operating from a sin-
gle +3.3V supply, this device accepts PECL serial
clock and data inputs, and delivers low-voltage differ-
ential-signal (LVDS) clock and data outputs for interfac-
ing with high-speed digital circuitry. It also provides an
LVDS synchronization input that enables data realign-
ment and reframing. The MAX3885 is available in the
extended temperature range (-40°C to +85°C) in a 64-
pin TQFP package.
Applications
2.488Gbps SDH/SONET Transmission Systems
Add/Drop Multiplexers
Digital Cross Connects
Features
o Single +3.3V Supply
o 2.488Gbps Serial to 155Mbps Parallel Conversion
o 660mW Operating Power
o LVDS Data Outputs and Synchronization Inputs
o Self-Biasing PECL Inputs Ease AC Coupling
o Synchronization Inputs for Data Realignment and
Reframing
PART
MAX3885ECB
Ordering Information
TEMP. RANGE
-40°C to +85°C
PIN-PACKAGE
64 TQFP
Pin Configuration appears at end of data sheet.
SERIAL DATA
INPUTS
V_CC = +3.3V
MAX3875
DATA
AND
CLOCK
RECOVERY
Typical Operating Circuit
V_CC = +3.3V
V_CC = +3.3V
V_CC
133Ω
133Ω
PD15+
86.6Ω
86.6Ω
SD+
SD-
MAX3885
PD15-
PD0+
100Ω*
•
•
•
V_CC = +3.3V
133Ω
86.6Ω
133Ω
SCLK+
SCLK-
86.6Ω
100Ω*
PD0-
PCLK+
100Ω*
PCLK-
SYNC+
SYNC-
GND
OVERHEAD
TERMINATION
*REQUIRED ONLY IF OVERHEAD CIRCUIT DOES NOT INCLUDE INTERNAL INPUT TERMINATION.
THIS SYMBOL REPRESENTS A TRANSMISSION LINE OF CHARACTERISTIC IMPEDANCE Z₀ = 50Ω.
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