MAX3670 Datasheet, PDF (1/13 Pages) Maxim Integrated Products – Low-Jitter 155MHz/622MHz Clock Generator

19-2166; Rev 0; 9/01
Low-Jitter 155MHz/622MHz
Clock Generator
General Description
The MAX3670 is a low-jitter 155MHz/622MHz reference
clock generator IC designed for system clock distribution
and frequency synchronization in OC-48 and OC-192
SONET/SDH and WDM transmission systems. The
MAX3670 integrates a phase/frequency detector, an
operational amplifier (op amp), prescaler dividers and
input/output buffers. Using an external VCO, the
MAX3670 can be configured easily as a phase-lock loop
with bandwidth programmable from 15Hz to 20kHz.
The MAX3670 operates from a single +3.3V or +5.0V
supply, and dissipates 150mW (typ) at 3.3V. The operat-
ing temperature range is from -40°C to +85°C. The chip
is available in a 5mm ✕ 5mm, 32-pin QFN package.
Applications
OC-12 to OC-192 SONET/WDM Transport
Systems
Clock Jitter Clean-Up and Frequency
Synchronization
Frequency Conversion
System Clock Distribution
Features
o Single +3.3V or +5.0V Supply
o Power Dissipation: 150mW at +3.3V Supply
o External VCO Center Frequencies (f_VCO): 155MHz
to 670MHz
o Reference Clock Frequencies: f_VCO, f_VCO/2,
f_VCO/8
o Main Clock Output Frequency: f_VCO
o Optional Output Clock Frequencies: f_VCO, f_VCO/2,
f_VCO/4, f_VCO/8
o Low Intrinsic Jitter: <0.4ps_RMS
o Loss-of-Lock Indicator
o PECL Clock Output Interface
Ordering Information
PART
MAX3670EGJ
*Exposed pad
TEMP. RANGE PIN-PACKAGE
-40°C to +85°C 32 QFN-EP* (5mm x 5mm)
Pin Configuration appears at end of data sheet.
Typical Application Circuit
155MHz
3.3V
142Ω
VCO
K_VCO = 25kHz/V
155MHz
142Ω
REFCLK+
REFCLK-
3.3V
VCCD
VCOIN+
100Ω
VCOIN-
MAX3670
MOUT+
MOUT-
142Ω
142Ω
RSEL
N.C.
VSEL
N.C.
0.01µF
332Ω
4700pF
500kΩ
4700pF
500kΩ
VC
OPAMP-
OPAMP+
POLAR
REPRESENTS A CONTROLLED-IMPEDANCE TRANSMISSION LINE.
GSEL1
N.C.
GSEL2
GSEL3
GND
3.3V
SETUP FOR 10kHz LOOP
BANDWIDTH
MAX3892
16:1
SERIALIZER
________________________________________________________________ Maxim Integrated Products 1
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