MAX3627 Datasheet, PDF (1/11 Pages) Maxim Integrated Products – +3.3V, Low-Jitter, Precision Clock Generator with Multiple Outputs

19-4567; Rev 0; 4/09
EVAALVUAAILTAIOBNLEKIT
+3.3V, Low-Jitter, Precision Clock
Generator with Multiple Outputs
General Description
The MAX3627 is a low-jitter, precision clock generator
optimized for network applications. The device inte-
grates a crystal oscillator and a phase-locked loop
(PLL) to generate high-frequency clock outputs for
Ethernet applications.
Maxim’s proprietary PLL design features ultra-low jitter
(0.4ps_RMS) and excellent power-supply noise rejection
(PSNR), minimizing design risk for network equipment.
The MAX3627 contains seven LVDS outputs and one
LVCMOS output. The output frequencies are selectable
among 125MHz, 156.25MHz, and 312.5MHz.
Applications
Ethernet Networking Equipment
Typical Operating Circuit
+3.3V ±5%
10.5Ω
0.1μF
0.1μF
0.1μF
10μF
0.01μF
VDDA
VDD VDDO_DIFF
OPEN
OPEN
OSC_IN
OE
MAX3627
33pF
25MHz
(CL = 18pF)
27pF
X_OUT
X_IN
VDD
PLL_BP
GND, OPEN, OR VDD
FSELA
GND, OPEN, OR VDD
FSELB
VDDO_SE 125MHz/156MHz/312.5MHz
Q0
Z0 = 50Ω
100Ω
ASIC
Q0
Z0 = 50Ω
125MHz/156MHz/312.5MHz
Q1
Z0 = 50Ω
100Ω
ASIC
Q1
Z0 = 50Ω
125MHz/156MHz/312.5MHz
Q2
Z0 = 50Ω
100Ω
ASIC
Q2
Z0 = 50Ω
125MHz/156MHz/312.5MHz
Q3
Z0 = 50Ω
100Ω
ASIC
Q3
Z0 = 50Ω
125MHz/156MHz/312.5MHz
Q4
Z0 = 50Ω
100Ω
ASIC
Q4
Z0 = 50Ω
125MHz/156MHz/312.5MHz
Q5
Z0 = 50Ω
100Ω
ASIC
Q5
Z0 = 50Ω
125MHz/156MHz/312.5MHz
Q6
Z0 = 50Ω
100Ω
ASIC
Q6
Z0 = 50Ω
33Ω 125MHz/156.25MHz
GND
Q7
Z0 = 50Ω
ASIC
Features
♦ Crystal Oscillator Interface: 25MHz
♦ OSC_IN Interface
PLL Enabled: 25MHz
PLL Disabled: 20MHz to 320MHz
♦ Outputs
One LVDS Output at 125MHz/156.25MHz/
312.5MHz (Selectable with FSELA)
Six LVDS Outputs at 125MHz/156.25MHz/
312.5MHz (Selectable with FSELB)
One LVCMOS Output at 125MHz/156.25MHz
(Selectable with FSELB)
♦ Low Phase Jitter
0.4ps_RMS (12kHz to 20MHz)
0.2ps_RMS (1.875MHz to 20MHz)
♦ Excellent PSNR: -64dBc at 156.25MHz with
40mV_P-P Supply Noise at 100kHz
♦ Operating Temperature Range: 0°C to +70°C
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX3627CTJ+
0°C to +70°C
32 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Pin Configuration
TOP VIEW
24 23 22 21 20 19 18 17
V_DD 25
16 OE
PLL_BP 26
15 FSELB
V_DDA 27
14 Q4
FSELA 28
OSC_IN 29
MAX3627
13 Q4
12 V_{DDO_DIFF}
X_IN 30
11 Q3
X_OUT 31
+
GND 32
*EP
10 Q3
9 GND
1 2345678
THIN QFN
(5mm × 5mm)
*EXPOSED PAD CONNECTED TO GROUND.
________________________________________________________________ Maxim Integrated Products 1
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or visit Maxim’s website at www.maxim-ic.com.