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MAX19712 Datasheet, PDF (1/36 Pages) Maxim Integrated Products – 10-Bit, 22Msps, Full-Duplex Analog Front-End
19-0528; Rev 0; 5/06
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10-Bit, 22Msps, Full-Duplex
Analog Front-End
General Description
Features
The MAX19712 is an ultra-low-power, highly integrated
mixed-signal analog front-end (AFE) ideal for wideband
communication applications operating in full-duplex
(FD) mode. Optimized for high dynamic performance
and ultra-low power, the device integrates a dual 10-bit,
22Msps receive (Rx) ADC; dual 10-bit, 22Msps transmit
(Tx) DAC; three fast-settling 12-bit aux-DAC channels
for ancillary RF front-end control; and a 10-bit, 333ksps
housekeeping aux-ADC. The typical operating power in
FD mode is 50.4mW at a 22MHz clock frequency.
The Rx ADCs feature 54.7dB SINAD and 75.6dBc SFDR
at 5.5MHz input frequency with a 22MHz clock frequen-
cy. The analog I/Q input amplifiers are fully differential
and accept 1.024VP-P full-scale signals. Typical I/Q
channel matching is ±0.01° phase and ±0.01dB gain.
The Tx DACs feature 72.9dBc SFDR at fOUT = 2.2MHz
and fCLK = 22MHz. The analog I-Q full-scale output volt-
age range is ±400mV differential. The output DC com-
mon-mode voltage is from 0.89V to 1.36V. The I/Q
channel offset is adjustable to optimize radio lineup side-
band/carrier suppression. Typical I-Q channel matching
is ±0.01dB gain and ±0.1° phase.
Two independent 10-bit parallel, high-speed digital
buses used by the Rx ADC and Tx DAC allow full-
duplex operation for frequency-division duplex applica-
tions. The Rx ADC and Tx DAC can be disabled
independently to optimize power management. A 3-wire
serial interface controls power-management modes, the
aux-DAC channels, and the aux-ADC channels.
♦ Dual 10-Bit, 22Msps Rx ADC and Dual 10-Bit,
22Msps Tx DAC
♦ Ultra-Low Power
50.4mW at fCLK = 22MHz, FD Mode
39.9mW at fCLK = 22MHz, Slow Rx Mode
33.9mW at fCLK = 22MHz, Slow Tx Mode
Low-Current Standby and Shutdown Modes
♦ Programmable Tx DAC Common-Mode DC Level
and I/Q Offset Trim
♦ Excellent Dynamic Performance
SNR = 54.8dB at fIN = 5.5MHz (Rx ADC)
SFDR = 72.9dBc at fOUT = 2.2MHz (Tx DAC)
♦ Three 12-Bit, 1μs Aux-DACs
♦ 10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and
Data Averaging
♦ Excellent Gain/Phase Match
±0.01° Phase, ±0.01dB Gain (Rx ADC) at
fIN = 5.5MHz
♦ Multiplexed Parallel Digital I/O
♦ Serial-Interface Control
♦ Versatile Power-Control Circuits
Shutdown, Standby, Idle, Tx/Rx Disable
♦ Miniature 56-Pin Thin QFN Package
(7mm x 7mm x 0.8mm)
TOP VIEW
Pin Configuration
The MAX19712 operates on a single 2.7V to 3.3V analog
supply and 1.8V to 3.3V digital I/O supply. The
MAX19712 is specified for the extended (-40°C to
+85°C) temperature range and is available in a 56-pin,
thin QFN package. The Selector Guide at the end of the
data sheet lists other pin-compatible versions in this AFE
family. For time-division duplex (TDD) applications, refer
to the MAX19705–MAX19708 AFE family of products.
Applications
WCDMA Handsets
801.11a/b/g WLAN
RFID Readers
VoIP Terminals
Portable Communication
Equipment
Ordering Information
PART*
PIN-PACKAGE
PKG CODE
42 41 40 39 38 37 36 35 34 33 32 31 30 29
ADC1 43
DAC3 44
DAC2 45
DAC1 46
VDD 47
IDN 48
IDP 49
GND 50
VDD 51
QDN 52
QDP 53
REFIN 54
COM 55
REFN 56
MAX19712
EXPOSED PADDLE (GND)
28 DA3
27 DA2
26 DA1
25 DA0
24 OVDD
23 OGND
22 AD9
21 AD8
20 AD7
19 AD6
18 AD5
17 AD4
16 AD3
15 AD2
1 2 3 4 5 6 7 8 9 10 11 12 13 14
MAX19712ETN
MAX19712ETN+
56 Thin QFN-EP**
56 Thin QFN-EP**
T5677-1
T5677-1
THIN QFN
NOTE: THE PIN 1 INDICATOR IS “+” FOR LEAD-FREE DEVICES.
*All devices are specified over the -40°C to +85°C operating range.
**EP = Exposed paddle. +Denotes lead-free package.
Functional Diagram and Selector Guide appear at end of
data sheet.
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