MAX19711 Datasheet, PDF (1/36 Pages) Maxim Integrated Products – 10-Bit, 11Msps, Full-Duplex Analog Front-End

19-0527; Rev 0; 5/06
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10-Bit, 11Msps, Full-Duplex
Analog Front-End
General Description
Features
The MAX19711 is an ultra-low-power, highly integrated
mixed-signal analog front-end (AFE) ideal for CDMA
communication applications operating in full-duplex
(FD) mode. Optimized for high dynamic performance
and ultra-low power, the device integrates a dual 10-bit,
11Msps receive (Rx) ADC; dual 10-bit, 11Msps transmit
(Tx) DAC with CDMA baseband filters; three fast-settling
12-bit aux-DAC channels for ancillary RF front-end con-
trol; and a 10-bit, 333ksps housekeeping aux-ADC. The
typical operating power in FD mode is 37.5mW/42.7mW
at a 4.915MHz/11MHz clock frequency.
The Rx ADCs feature 54.8dB SNR and 74.2dBc SFDR at
1.875MHz input frequency with an 11MHz clock frequen-
cy. The analog I/Q input amplifiers are fully differential
and accept 1.024V_P-P full-scale signals. Typical I/Q
channel matching is ±0.01° phase and ±0.01dB gain.
♦ Dual 10-Bit, 11Msps Rx ADC and Dual 10-Bit,
11Msps Tx DAC
♦ Ultra-Low Power
37.5mW/42.7mW at f_CLK = 4.915MHz/11MHz,
FD Mode
24.3mW at f_CLK = 11MHz, Slow Rx Mode
34.5mW at f_CLK = 11MHz, Slow Tx Mode
Low-Current Standby and Shutdown Modes
♦ Integrated CDMA Filters with > 64dBc Stopband
Rejection
♦ Programmable Tx DAC Common-Mode DC Level
and I/Q Offset Trim
♦ Excellent Dynamic Performance
SNR = 54.8dB at f_IN = 1.875MHz (Rx ADC)
SFDR = 75dBc at f_OUT = 620kHz (Tx DAC)
♦ Three 12-Bit, 1µs Aux-DACs
The Tx DACs with CDMA lowpass filters feature -3dB
cutoff frequency of 1.3MHz and > 64dBc stopband
rejection at f_IMAGE = 4.285MHz at f_CLK = 4.915MHz. The
analog I-Q full-scale output voltage range is selectable at
±410mV or ±500mV differential. The output DC common-
mode voltage is selectable from 0.86V to 1.36V. The I/Q
channel offset is adjustable to optimize radio lineup side-
band/carrier suppression. Typical I-Q channel matching
is ±0.03dB gain and ±0.07° phase.
Two independent 10-bit parallel, high-speed digital
buses used by the Rx ADC and Tx DAC allow full-
duplex operation for frequency-division duplex applica-
tions. The Rx ADC and Tx DAC can be disabled
independently to optimize power management. A 3-wire
serial interface controls power-management modes, the
aux-DAC channels, and the aux-ADC channels.
♦ 10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and
Data Averaging
♦ Excellent Gain/Phase Match
±0.01° Phase, ±0.01dB Gain (Rx ADC) at
f_IN = 1.87MHz
♦ Multiplexed Parallel Digital I/O
♦ Serial-Interface Control
♦ Versatile Power-Control Circuits
Shutdown, Standby, Idle, Tx/Rx Disable
♦ Miniature 56-Pin Thin QFN Package
(7mm x 7mm x 0.8mm)
Pin Configuration
TOP VIEW
The MAX19711 operates on a single 2.7V to 3.3V analog
supply and 1.8V to 3.3V digital I/O supply. The
MAX19711 is specified for the extended (-40°C to
+85°C) temperature range and is available in a 56-pin,
thin QFN package. The Selector Guide at the end of the
data sheet lists other pin-compatible versions in this AFE
family. For time-division duplex (TDD) applications, refer
to the MAX19705–MAX19708 AFE family of products.
Applications
CDMA Handsets
CDMA Data Cards
Portable Communication
Equipment
Ordering Information
42 41 40 39 38 37 36 35 34 33 32 31 30 29
ADC1 43
DAC3 44
DAC2 45
DAC1 46
VDD 47
IDN 48
IDP 49
GND 50
VDD 51
QDN 52
QDP 53
REFIN 54
COM 55
REFN 56
MAX19711
EXPOSED PADDLE (GND)
28 DA3
27 DA2
26 DA1
25 DA0
24 OV_DD
23 OGND
22 AD9
21 AD8
20 AD7
19 AD6
18 AD5
17 AD4
16 AD3
15 AD2
1 2 3 4 5 6 7 8 9 10 11 12 13 14
PART*
PIN-PACKAGE
PKG CODE
MAX19711ETN
56 Thin QFN-EP**
T5677-1
MAX19711ETN+
56 Thin QFN-EP**
T5677-1
*All devices are specified over the -40°C to +85°C operating range.
**EP = Exposed paddle. +Denotes lead-free package.
THIN QFN
NOTE: THE PIN 1 INDICATOR IS “+” FOR LEAD-FREE DEVICES.
Functional Diagram and Selector Guide appear at end of
data sheet.
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