MV64420 Datasheet, PDF (1/2 Pages) –

Discovery^™ LT
MIPS^® System Controller
MV64420
PRODUCT OVERVIEW
The Marvell^¨ Discovery^ª LT MV64420 system controller is the industryÕs most powerful and cost-effective
architecture for MIPS^¨ CPU-based systems. Building upon MarvellÕs industry-standard Discovery platform, the
Discovery LT devices incorporate an innovative crossbar architecture, advanced communications peripherals
and performance-tuned interfaces, setting new technology benchmarks for performance and integration. The
Discovery LT MV64420 system controllerÕs high-performance crossbar switch architecture with any-to-any
connectivity, allows system designers to develop high-performance, scalable systems. The Discovery LT MV64420
device supports both the traditional SysAD and the extended PMC-Sierra^¨ MIPS RM7000x bus protocols. Additionally,
the Discovery LT product integrates two on-chip XOR engines to accelerate RAID applications. The Marvell
Discovery LT system controllers are optimally designed for a broad range of applications, from sophisticated
routers, switches and wireless base stations to high-volume, cost-sensitive storage and laser printer applications.
MIPS (SysAD) @ 133/166 MHz
UARTS, TWSI
4 DMA
2 XOR
GPIO, MPSC,
TWSI, Int,
Timers
CPU Interface
DDR
Device
72-bit @ 333 MHz
32-bit @ 133 MHz
10/100/1000 Mbps
GbE
PCI-X
64-bit @ 133 MHz
Fig 1. Discovery LT MIPS System Controller (MV64420) Block Diagram
FEATURES
BENEFITS
Â¥ MIPS CPU interface with up to 166 MHz CPU bus frequency
Â¥ Supports all leading 64-bit MIPS CPUs including PMC-Sierra RM7000C
and RM79xx
Â¥ Supports traditional SysAD and the extended PMC-Sierra MIPS
RM7000x bus protocols
Â¥ Enable the highest performing MIPS subsystems
¥ Crossbar switch architecture with up to 100 Gbps aggregate throughput ¥ Provide wire-speed performance between controller blocks to enable
concurrent, non-blocking connectivity
Â¥ Two on-board XOR engines
Â¥ Offloads CPU to accelerate RAID applications
Â¥ 64-bit PCI/PCI-X interface with 66 MHz/133 MHz operation offering
complete host PCI bridging
Â¥ Preserve legacy PCI investment and provide easy migration to future
PCI-X based platforms, more than 16 Gbps aggregate throughput
¥ Gigabit Ethernet (GbE) Media Access Controller (MAC) with MII, RGMII, ¥ Enable greater data throughput
GMII support
Â¥ 72-bit DDR SDRAM controller at a clock rate of 166 MHz
(333 Mbps data rate)
Â¥ Supports cost-effective, high-bandwidth DDR SDRAM memory with
full ECC protection
¥ 32-bit high-speed device controllerÑup to 133 MHz clock rate
Â¥ Connectivity to boot FLASH as well as high throughput peripherals
as SyncBurst SRAM or custom ASICs