TLF50211EL_15 Datasheet, PDF (12/27 Pages) Marl International Limited – 2.2 MHz Step-Down Regulator 500 mA, 5 V, low quiescent current

TLF50211EL
Buck Regulator
At point t₃ after a normal time period T_PWM as adjusted by the frequency setting resistor R_FREQ, a further pulse of
the duration T_ON,min is applied, the output voltage V_CC keeps on rising. The regulator is still in PWM mode.
At point t₄ the output voltage V_CC touches (or exceeds) the voltage threshold for transition from PWM to PFM
V_PWM/PFM. The regulator is now switching internally from PWM to PFM. In PFM mode the power consumption of
the internal blocks is reduced. The reference for the output voltage V_CC is switched from V_{REF_PWM} (which is equal
to V_FB in PWM mode) to V_{REF_PFM} (which is equal to V_FB in PFM mode). The reference for V_FB in PFM mode is
higher than the reference in PWM mode to avoid voltage dumps at the output voltage V_CC due to sudden load
steps and to give the regulator more reaction time to switch back to PWM mode.
The regulator is now in PFM mode, the output voltage is V_{REF_PFM} which is equal to V_FB (or slightly higher) in PFM
mode.
The output voltage V_CC is monitored and as soon as it touches the PFM reference voltage V_{REF_PFM} a pulse of the
on-time T_ON,min is triggered. The time between two pulses is depending on the discharging of the output capacitor
C_OUT.
i₁
D₁
T_ON1
D₂
T_ON2
i₂
D₃
T_ON,min
i_PWM/PFM
i₃
time
T_PWM T_PWM
t₁
T_PWM
time
Switch to PFM mode
V_{REF_PFM}
V_PWM/PFM
V_{REF_PWM}
t₂
t₃ t₄
time
Figure 4 PWM to PFM Transition (Timing Diagram)
Data Sheet
12
Rev. 1.0, 2013-06-19