TB62705CPG Datasheet, PDF (3/15 Pages) Marktech Corporate – 8-BIT SHIFT REGISTER, LATCHES & CONSTANT-CURRENT DRIVERS

PIN DESCRIPTION
TB62705CPG/CFG/CFNG
PIN No.
1
2
3
4
5~12
13
14
15
16
PIN NAME
FUNCTION
GND
SERIAL−IN
CLOCK
LATCH
OUTn
ENABLE
SERIAL−OUT
R−EXT
V_DD
GND terminal for control logic
Input pin for shift register serial data
Clock input terminal for data shift to up-edge.
Data strobe input terminal. Latches pass LATCH data with “H” level input and retain data with “L”
level input.
Output terminals
Input terminal for output enable. All outputs ( OUTn ) go off with ENABLE data input at "H" level
and go on with data input at "L" level.
Output terminal for serial data for the next SERIAL-IN terminal.
Input terminal for connecting a resistor to regulate all output currents.
5-V supply pin of the IC
TRUTH TABLE
CLOCK
LATCH
ENABLE
SERIAL−IN
OUTn
SERIAL−OUT
UP
H
UP
L
UP
H
DOWN
X
DOWN
X
L
D_n
L
D_n+1
L
D_n+2
L
D_n+3
H
D_n+3
D_n ··· D_n−5 ··· D_n−7
No change
D_n+2 ··· D_n−3 ··· D_n−5
D_n+2 ··· D_n−3 ··· D_n−5
Off
D_n−7
D_n−6
D_n−5
D_n−5
D_n−5
Note:
OUTn = on if D_n = H level, and OUTn = off if D_n = L level.
An external resistor is connected with R−EXT and GND. Be sure to administer the correct power supply
voltage.
INPUT/OUTPUT EQUIVALENT CIRCUITS
1. ENABLE terminal
2. LATCH terminal
3. CLOCK, SERIAL−IN terminal
4. SERIAL−OUT terminal
3
2005-10-06