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XP1043-QH_15 Datasheet, PDF (6/7 Pages) M/A-COM Technology Solutions, Inc. – Power Amplifier
XP1043-QH
Power Amplifier
12.0-16.0 GHz
Rev. V1
App Note [1] Biasing - As shown in the Pin Designations table, the device is operated under the nominal bias
conditions of VD1,2,3 at 7.0V with 100, 200, 400mA respectively. The device can also be safely biased to a
maximum of 9 V and 1.4 A to provide greater than 2 Watts of saturated RF power. It is recommended to use ac-
tive bias to keep the currents constant in order to maintain the best performance over temperature. Under heavy
RF saturation the device will tend to self bias and pull the desired drain current. Depending on the supply volt-
age available and the power dissipation constraints, the bias circuit may be a single transistor or a low power
operational amplifier, with a low value resistor in series with the drain supply used to sense the current. The gate
of the pHEMT is controlled to maintain correct drain current and thus drain voltage. The typical gate voltage
needed to do this is -1.0V. Make sure to sequence the applied voltage to ensure negative gate bias is available
before applying the positive drain supply.
App Note [2] Board Layout - As shown in the board layout, it is recommended to provide 100pF decoupling
caps as close to the bias pins as possible, with additional 10μF decoupling caps.
App Note [3] Power Detector - As shown in the schematic below, the power detector is implemented by provid-
ing +5V bias and measuring the difference in output voltage with standard op-amp in a differential mode configu-
ration.
Bias Circuit
From Bias
Circuit
R
To Gate
-5V
The output impedance of the bias circuit’s gate output
should be small. When in saturation, the gates of the
XP1043-QH can draw several mA which may cause ad-
verse affects in a gate circuit with high output impedance. It
is recommended that an Emitter Follower circuit be used
(shown above), which follows the bias circuit’s gate output.
This will result in a high-input impedance, low-output im-
pedance buffer between the gate output of the bias circuit
and the gate input of the XP1043-QH.
Emitter Follower placed between the
(gate) output of the bias circuit MMIC gate
6
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and/or prototype measurements. Commitment to develop is not guaranteed.
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Solutions has under development. Performance is based on engineering tests. Specifications are
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changes to the product(s) or information contained herein without notice.