XR1008-QB_16 Datasheet, PDF (5/9 Pages) M/A-COM Technology Solutions, Inc. – Sub-harmonic, Image Reject Receiver

XR1008-QB
Receiver
35 - 45 GHz
Rev. V1
App Note [1] Biasing - Please refer to the functional block diagram and pin-out table for biasing
information. The device is operated by biasing VD=4.0 V with ID=180 mA by adjusting the applied voltage
on VG1. VG1 typically requires-0.5 V to result in the drain current being 180 mA. The nominal input
impedance of this gate is 180 Ω, so it should be noted that the nominal gate current will be 2.7 mA.
Additionally, a fixed bias of VG2=-0.5 V is required to bias the mixer and doubler. Adjusting VG2 above or
below this value can adversely affect conversion gain, image rejection and intercept point performance. It is
recommended to use active biasing to keep the currents constant as the RF power and temperature vary;
this gives the most reproducible results. The diagram “Active Bias Circuit” demonstrates a possible method
for active biasing. Depending on the supply voltage available and the power dissipation constraints, the
bias circuit may be a single transistor or a low power operational amplifier, with a low value resistor in
series with the drain supply used to sense the current. The gate of the pHEMT is controlled to maintain
correct drain current and thus drain voltage. Typically the gate is protected with Silicon diodes to limit the
applied voltage. Also, make sure to sequence the applied voltage to ensure negative gate bias is available
before applying the positive drain supply.
Active Bias Circuit
5.0V
5k76
4.0V
1
3.3V
MMBT3904
1
12k1
12k1
( ) I = 5-4
5.62
5R62 (sense)
4V, 180mA
4.0V
MMBT3906
100R
-5.0V
1k0
100n
3
BAV99
Vd
100n
10R
Vg1
3 ^BAV99
5
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