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M02050-15 Datasheet, PDF (20/28 Pages) M/A-COM Technology Solutions, Inc. – 3.3/5V Limiting Amplifier for Applications to 2.5 Gbps
Applications Information
f3dB = 1/ (2 * π * 50 Ω * CAC)
so solving for C where f3dB = fCUTOFF
CAC = 1/ (2 * π * 50 Ω * fCUTOFF)
EQ.1
and in this case the minimum capacitor is 12 nF.
For Ethernet or Fibre Channel, there are less consecutive bits in the data, and the recommended cut-off frequency
is 1/(1,000) of the input data rate. This results in a minimum capacitor of 1.5 nF for 2.125 Gbps Fibre Channel.
Multirate applications down to 155 Mbps
In this case, the input coupling capacitor needs to be large enough to pass 15 kHz (155x106/10,000) which results
in a capacitor value of 0.2 µF. However, because this low pass frequency is close to the 25 kHz low pass frequency
of the internal DC servo loop, it is preferable to use a larger input coupling capacitor such as 1 µF which provides
an input cutoff frequency of 3.1 kHz. This separates the two poles sufficiently to allow them to be considered inde-
pendent. This capacitor should also have a 10 nF capacitor in parallel to pass the higher frequency data (in the
multirate application) without distortion.
In all cases, a high quality coupling capacitor should be used as to pass the high frequency content of the input
data stream.
4.1.4
Using Rate Selection
Because of the performance of PECL outputs, the M02050-15 should not be used at data rates above 2.5 Gbps.
When the RATESEL pin (shown in Figure 3-10) is driven high, the M02050-15 bandwidth is set to its maximum
which allows the M02050-15 to operate at data rates up to 2.5 Gbps.
Because of the nature of the ESD structure on this pin, if it is driven by a device with IOL or IOH > 2 mA then a 1 kΩ
to 10 kΩ resistor should be used in series with the RATESEL pin. If rate selection is not used and the part is config-
ured for high bandwidth only, the RATESEL pin should be connected to VCC using a 1 kΩ to 10 kΩ resistor. When
operating at data rates ≤ 1.25 Gbps, then RATESEL should be left floating (do not tie low). This enables low-rate
mode which reduces the bandwidth (and thus the noise level) of the part.
4.1.5
Using RSSIAVG
As shown in the typical applications circuit (Figure 4-1), when interfacing to a TIA that features a “MON” output
such as the M02013 or M02016, the M02050-15 can reference the current sunk into the TIA “MON” output and pro-
duce a proportional current at the M02050-15 RSSIAVG output. The current is sourced into resistor REXT to ground
creating a voltage suitable for DDMI applications. REXT should be chosen as:
REXT = 1/(maximum current into RSSIAVG)
EQ.2
This keeps the voltage at RSSIAVG between 0 and 1 V.
4.1.6
Setting the Signal Detect Level
Using Figure 4-3, the value for RST is chosen to set the LOS threshold at the desired value. The resulting hystere-
sis is also shown in Figure 4-3.
02050-DSH-002-F
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