English
Language : 

02046-DSH-003-F Datasheet, PDF (11/23 Pages) M/A-COM Technology Solutions, Inc. – 3.3/5V Limiting Amplifier for Applications to 1.25 Gbps
Functional Description
3.3.2
DC Offset Compensation
The M02046 contain an internal DC autozero circuit that can remove the effect of DC offsets without using external
components. This circuit is configured such that the feedback is effective only at frequencies well below the lowest
frequency of interest. The low frequency cut off is typically 25 kHz.
3.3.3
Data Outputs
The M02046 features 100k/300k PECL compliant outputs as shown in Figure 3-3. The outputs may be terminated
using any standard AC or DC-coupling PECL termination technique. AC-coupling is used in applications where the
average DC content of the data is zero e.g. SONET. The advantage of this approach is lower power consumption,
no susceptibility to DC drive and compatibility with non-PECL interfaces.
Figure 3-3. PECL Data Outputs
VCC
PECLP
PECLN
50 Ω 50 Ω
VCC - 2V
3.3.4
Signal Detect (ST) and Loss of Signal (LOS)
The M02046 features input signal level detection over an extended range. Using an external resistor, RST, between
pin STSET and VCC3 (Figure 3-6) the user can program the input signal threshold. The signal detect status is
indicated on the both the Signal Detect (ST) and LOS output pins. The Status output is either CMOS
(M02046-15) or PECL (M02046-25). The PECL version is shown in Figure 3-4 while Figure 3-5 shows the ST
output for the CMOS version of the device (and the LOS output for both versions of the device).
The ST (LOS) signal is active (not asserted) when the signal is above the threshold value. The signal detection
circuitry has the equivalent of 3.5 dB (typical) electrical hysteresis.
02046-DSH-003-F
Mindspeed Technologies™
9
Mindspeed Proprietary and Confidential