M21355 Datasheet, PDF (1/2 Pages) M/A-COM Technology Solutions, Inc. – 3G/HD/SD-SDI Low Power Quad Video Reclocker

M21355 3G/HD/SD-SDI Low Power Quad Video Reclocker
> Product Overview
The M21355 is a quad serial digital video reclocker with integrated trace equalization, automatic rate detect (ARD)
circuitry, and a 16:4 crosspoint switch at the input. It operates at SDI data rates ranging from 270Mbps to 2970Mbps
and is compliant to SMPTE 424M, SMPTE292M, and SMPTE 259M. At 270Mbps, it also supports DVB-ASI.
The M21355 has an input jitter tolerance (IJT) of greater than 0.6 unit intervals (UI) and can provide retimed serial
outputs with very low output jitter. The quad reclocker requires a single, external, 27MHz crystal, which is used as the
reference clock for all four channels. It includes per lane analog input equalization for up to 40” of FR4 trace and two
connectors in addition to output de-emphasis.
This device features integrated supply regulators, allowing it to be powered from 1.2V, 1.8V, 2.5V, or 3.3V supply volt-
ages. When operating at 1.2V, it consumes only 135mW per channel at 3G-SDI. Furthermore, the power rails for the
core, input, and output circuitry are electrically isolated on-chip and as such may be connected to different voltage
rails on the board. This feature enables the M21355 to be DC coupled to any upstream or downstream device regard-
less of its input/output voltage level.
The 16:4 crosspoint at the input allows any of the 16 inputs to be routed to any of the four integrated reclockers and
its respective output. The device, and the input crosspoint, may be configured by setting the internal registers though
the I²C or SPI interfaces. Optionally, the quad reclocker may be configured at power up through an external I²C EEPROM
device. Limited configuration is also possible through hardware configuration.
The M21355 is offered in a green and RoHS compliant, 10mm x 10mm, 72pin QFN package.
Features
>> Independent, quad channel, multi-rate reclocker
Benefits
Save board area and enable high density designs
>> SMPTE 424M, 292M, 259M-C, and DVB-ASI compliant
Standard compliant solution
>> 0.6UI input jitter tolerance
Enable robust, error free designs
>> Integrated 50Ω input termination
Save board area and enable high density designs
>> 16:4 input crosspoint
Save cost and area (no external component necessary)
>> Input equalization 40” of FR4 Trace and two connectors
Ease of high speed design and layout
>> Output de-emphasis
Ease of high speed design and layout
>> 135mW power consumption per channel (1.2V operation)
Enable low power designs with minimal heat dissipation
>> Integrated regulators for multi-voltage operation (1.2V – 3.3V) Reduce number of power rails required on a board
>> Electrically isolated input, output, and core supply rails
DC interface – saves board area and cost
>> Mute and configurable auto or manual bypass mode
Allow design for non-standard rates
>> Automatic and manual modes for rate indication and selection Ease of use and flexibility
>> Loss of lock (LOL), loss of signal (LOS) and data rate indication Ease of status update and diagnostics
>> I²C, SPI and I²C EEPROM interface
Flexibility and ease of control and configuration
>> Industrial operating temperature range ( -40°C to +85°C)
Provides higher tolerance and additional design margin
>