M02046-15 Datasheet, PDF (1/27 Pages) M/A-COM Technology Solutions, Inc. – 3.3 5V Limiting Amplifier for Applications from 100 Mbps to 1.25 Gbps

M02046-15
3.3/5V Limiting Amplifier for Applications from 100 Mbps to 1.25 Gbps
Rev V4
Applications
• 1.06 Gbps Fibre Channel
• 1.25 Gbps Ethernet
• 1.25 Gbps SDH/SONET
• SDH/SONET 155 Mbps Transceivers
• FTTx and Media Converters
• Fast Ethernet Receivers
• FDDI 125 Mbps Receivers
• ESCON Receivers
Features
• Pin compatible with the MC2046-2
• Operates with a 3.3V or 5V supply
• 2.8 mV typical input sensitivity at 1.25 Gbps
• Programmable input-signal level detect
• On-chip DC offset cancellation circuit
• CMOS and PECL Signal Detect output variants
• Output Jam Function
• Low power (< 200 mW (M02046-15) at 3.3V including PECL load)
The M02046 is a highly integrated high-gain limiting amplifier that can be used with the same board layout and foot-
print as the MC2046-2 (refer to 02046-APP-004-X where X is the revision which will change if the application note is
revised). Featuring PECL outputs, the M02046 is intended for use in applications from 100 Mbps to 1.25 Gbps. Full
output swing is achieved even at minimum input sensitivity. The M02046 can operate with a 3.3V or 5V supply.
Included in the M02046 is a programmable signal-level detector, allowing the user to set thresholds at which the
logic outputs are enabled. The signal detect function has typically 2 dB (optical) of hysteresis which prevents chatter
at low input levels. A squelch function, which turns off the output when no signal is present, is provided by externally
connecting the LOS Status output to the JAM input.
The M02046-15 has a CMOS Status output and the M02046-25 has a PECL Status output. Both versions have a
CMOS LOS output.
Other available solutions: M02040-15 3.3/5V Limiting Amplifier for Applications to 2.125 Gbps (PECL outputs)
M02050-15 3.3/5V Limiting Amplifier for Applications to 2.5 Gbps (PECL outputs)
M02049-15 3.3/5V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs)
M02043-15 3.3/5V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs)
Typical Applications Diagram
12.1 kΩ
+3.3 V
Photodiode
V_TT
AC-Coupled
to TIA
DINP
MT02I0A16
MON
DINN
I_REF
Biasing
Limiting
Amplifier
Jam
optional
Output
Buffer
PECLP
PECLN
Clock Data
Recovery
Unit
Offset cancel
Level
Detect
Comparator
Threshold
Setting
Circuit
Regulator
AC or DC Coupled
(as described in
Applications Information)
ST
LOS
ST_SET
R _ST
V_CC3 V_CC
1
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