28985-BRF-001-A Datasheet, PDF (1/2 Pages) M/A-COM Technology Solutions, Inc. – Octal G.shdsl Transceiver with Embedded Microprocessor

ZipWireMulti^™
Octal G.shdsl Transceiver with Embedded Microprocessor
CX28985
Complete G.shdsl/HDSL2/SDSL/
HDSL/IDSL Multimode DSL Solution
The ZipWireMulti eight-port multimode DSL solution
implements Mindspeed Technologies’™ LoopWizard^™
technology to diagnose line problems without expensive
test equipment or truck rolls (see LoopWizard xDSL Loop
Diagnotic Software literature). The ZipWireMulti DSL
solution goes beyond simple compliance with the ITU G.shdsl
standard by supporting the optional enhanced performance
asymmetrical PSD (EPAP) modes of operation.In addition,
it complies with the ANSI HDSL2 standard (ANSI T1.418)
and provides interoperability with Mindspeed’s
market-leading ZipWire™ transceivers by operating in
2B1Q multi-rate mode. The 2B1Q mode supports
AutoBaud^™ for SDSL interoperability, rate optimization,
fast connect times and standards-based HDSL operation.
The ZipWireMulti also runs in IDSL mode for interoperability
with basic-rate ISDN repeaters. The solution supports
Mindspeed’s proprietary modes, such as 32-PAM,64 Kbps
and 3.088 Mbps operation, which provide enhanced
spectral compatibility, extended subscriber-line reach
and high-speed operation. One hardware circuit (i.e.,one
transformer, crystal and hybrid) supports all these modes,
which can be configured in real time via software control.
Embedded Microprocessor
The ZipWireMulti chipset includes an embedded ARM
microprocessor and a full suite of software that
facilitates speedy, simplified development of systems that
comply with all applicable ITU, ANSI and ETSI standards.
> K EY F E AT U R E S
> Eight-port CO solution
implementing LoopWizard
technology
> Multimode operation
> Low power consumption
> Highly integrated solution
> Embedded microprocessor
> Simultaneous operation
ofUTOPIA Level 2 and PCM
interfaces
> Interoperable with ZipWire
2B1Q transceivers including
AutoBaud
The embedded microprocessor and software handle the
EOC processing and many other functions often delegated
to an external host controller in competing solutions. This
greatly reduces software-porting effort and eliminates
real-time processing requirements for an external host
controller. The host controls the ZipWireMulti through a
simple and well-defined software API structure while the
internal ARM processor handes all real-time processing.
UTOPIA and PCM Interfaces Operate
Simultaneously
The ZipWireMulti’s integrated framers include
full-featured UTOPIA Level 2 and PCM interfaces. The
UTOPIAinterface includes ATM TC-layer processing.
The DSL payload can be mapped to either interface, or
split between them to enable simultaneous connections
to ATM- and TDM-based systems. This feature is
programmable on a per-port basis, and supports a mix
of channels transporting data, data plus time slot voice,
or only time slot voice.
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